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Low power encoding schemes for run-time on-chip bus
Po-Tsang Huang
*
, Wei Hwang
*
Corresponding author for this work
International College of Semiconductor Technology
Research output
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Contribution to conference
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Paper
›
peer-review
3
Scopus citations
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Keyphrases
Low Power
100%
Coding Scheme
100%
On-chip Bus
100%
Coupling Effect
75%
Power Consumption
50%
Phase Coding
50%
MPEG
25%
Power Bus
25%
Design Scheme
25%
HSPICE
25%
Deep Submicron Technology
25%
SoC Design
25%
Bus Encoding
25%
Transition Activity
25%
Random Data
25%
Engineering
Encoding Scheme
100%
Coupling Effect
75%
Electric Power Utilization
50%
System-on-Chip
50%
Simulation Result
25%
Interconnects
25%
MPEG
25%
Scheme Design
25%
Data Stream
25%
Computer Science
Encoding Scheme
100%
Power Consumption
50%
System-on-Chip
50%
Data Stream
25%
MPEG
25%