Low power device technology with SiGe channel, HfSiON, and poly-Si gate

Howard C.H. Wang*, Shang Jr Chen, Ming Fang Wang, Pang Yen Tsai, Ching Wei Tsai, Ta Wei Wang, Steve M. Ting, Tuo-Hung Hou, Peng Soon Lim, Huan Just Lin, Ying Jin, Hun Jan Tao, Shih Chang Chen, Carlos H. Diaz, Mong Song Liang, Chen-Ming Hu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

20 Scopus citations

Abstract

We report solutions to the formidable challenges posed by integrating a HfSiON dielectric with a poly-Si gate for low-power device technology. A 1.5 nm EOT HfSiON is demonstrated with mobility comparable to SiO 2 and 3 orders of magnitude leakage reduction. A novel boron delta-doped strained-SiGe channel points a way out of the high threshold voltage problem associated with Fermi-pinning at the high-k/poly-Si interface and ameliorates short-channel effects in PMOS devices. In addition, a 20% hole mobility enhancement and 15% I on -I off characteristics improvement are achieved owing to the compressive SiGe channel. NMOS PBTI lifetime of 35 years, and PMOS NBTI and NMOS hot carrier lifetimes of more than 1000 years are demonstrated at 1.2 V.

Original languageEnglish
Title of host publicationIEEE INTERNATIONAL ELECTRON DEVICES MEETING 2004, TECHNICAL DIGEST
PublisherIEEE
Pages161-164
Number of pages4
ISBN (Print)0-7803-8684-1
DOIs
StatePublished - 1 Dec 2004
EventIEEE International Electron Devices Meeting, 2004 IEDM - San Francisco, CA, United States
Duration: 13 Dec 200415 Dec 2004

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISSN (Print)0163-1918

Conference

ConferenceIEEE International Electron Devices Meeting, 2004 IEDM
Country/TerritoryUnited States
CitySan Francisco, CA
Period13/12/0415/12/04

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