TY - GEN
T1 - Low power and power aware design for DVB-T/H baseband inner receiver
AU - Tseng, Chi Yao
AU - Wei, Ting Chen
AU - Liu, Wei Chang
AU - Jou, Shyh-Jye
PY - 2007
Y1 - 2007
N2 - From hardware point of view, system and RTL low power and power aware design techniques are applied to the DVB-T/H baseband inner receiver. In RTL design, we use pre-computation, differential encoding, hardware sharing, time-multiplexing RAV of memory, low power arithmetic architecture so that each block can reduce power from 3% to 26%. In system level, the proposed DPM (Dynamic Power Manager) is a power control unit for our system. When the system enters the offset tracking mode, the DPM controls the power states of system blocks between the GI (Guard Interval) period and symbol period. The power reduction ratio ranges from 3%-20% (it depends on the GI mode). Moreover, a predicted phase scheme is proposed to provide the initial phase offset for the start of symbol period during offset tracking mode. The overall reduction for synchronization loop is about 50% in both hardware area and power.
AB - From hardware point of view, system and RTL low power and power aware design techniques are applied to the DVB-T/H baseband inner receiver. In RTL design, we use pre-computation, differential encoding, hardware sharing, time-multiplexing RAV of memory, low power arithmetic architecture so that each block can reduce power from 3% to 26%. In system level, the proposed DPM (Dynamic Power Manager) is a power control unit for our system. When the system enters the offset tracking mode, the DPM controls the power states of system blocks between the GI (Guard Interval) period and symbol period. The power reduction ratio ranges from 3%-20% (it depends on the GI mode). Moreover, a predicted phase scheme is proposed to provide the initial phase offset for the start of symbol period during offset tracking mode. The overall reduction for synchronization loop is about 50% in both hardware area and power.
UR - http://www.scopus.com/inward/record.url?scp=34648831070&partnerID=8YFLogxK
U2 - 10.1109/VDAT.2007.373245
DO - 10.1109/VDAT.2007.373245
M3 - Conference contribution
AN - SCOPUS:34648831070
SN - 1424405831
SN - 9781424405831
T3 - 2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers
BT - 2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers
T2 - 2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007
Y2 - 25 April 2007 through 27 April 2007
ER -