@inproceedings{8e3c35c936124e619805c234b289b802,
title = "Low-Power 3D-PCB Stacking System Design and Validation by Automatic Voltage-Current Scalable Technique",
abstract = "The proposed design is integrating multiple video and power-regulate chips integrated with a low-power 3D-PCB Stacking system. This performance-power optimized 3D-PCB Stacking SoC system is corroborated by the dual multi-mode video decoder (MMVD) and five voltage-current adjustors (VCAs) chips. Low-power dual-Vdd design techniques are utilized in MMVD, without using level converters. The VCA is used to supply manageable power-current to MMVD. The automated voltage-current adjusted technique does not increase the additional silicon cost without using voltage converters. The low-power contribution is to utilize current-Adjusted technique for an automation voltage-Adjustor. A built-in voltage measurement provides voltage-level can be safely regulated.The system achieves a 32 \sim 68% power reduction for two video decoders by using the VCAs. The system scalable function is implemented by a MorPack 3D-PCB stacking design. The proposed technique is success validated reduce system power consumption and without performance degradation.",
keywords = "heterogeneous 3D-IC, system-in-package",
author = "Cheng, {Ching Hwa} and Jiun-In Guo",
note = "Publisher Copyright: {\textcopyright} 2020 IEEE. Copyright: Copyright 2020 Elsevier B.V., All rights reserved.; 2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020 ; Conference date: 10-08-2020 Through 13-08-2020",
year = "2020",
month = aug,
doi = "10.1109/VLSI-DAT49148.2020.9196244",
language = "English",
series = "2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020",
address = "United States",
}