Low-capaeitance SCR with waffle layout structure for on-chip ESD protection in RF ICs

Chun Yu Lin; Ming-Dou Ker

doi:10.1109/RFIC.2007.380991

Low-capaeitance SCR with waffle layout structure for on-chip ESD protection in RF ICs

Chun Yu Lin^*, Ming-Dou Ker

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

12 Scopus citations

Abstract

Silicon-controlled rectifier (SCR) has been used as an effective on-chip ESD protection device in CMOS technology due to the highest ESD robustness. In this work, the waffle layout structure for SCR can achieve smaller parasitic capacitance under the same ESD robustness. With smaller parasitic capacitance, the degradation on RF circuit performance due to ESD protection device can be reduced. The proposed waffle SCR with low parasitic capacitance is suitable for on-chip ESD protection in RF ICs.

Original language	English
Title of host publication	Proceedings of the 2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007
Pages	749-752
Number of pages	4
DOIs	https://doi.org/10.1109/RFIC.2007.380991
State	Published - 2 Oct 2007
Event	2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007 - Honolulu, HI, United States Duration: 3 Jun 2007 → 5 Jun 2007

Publication series

Name	Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
ISSN (Print)	1529-2517

Conference

Conference	2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007
Country/Territory	United States
City	Honolulu, HI
Period	3/06/07 → 5/06/07

Keywords

Electrostatic discharges (ESD)
Radio-frequency integrated circuit (RF IC)
Silicon-controlled rectifier (SCR)

Access to Document

10.1109/RFIC.2007.380991

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title = "Low-capaeitance SCR with waffle layout structure for on-chip ESD protection in RF ICs",

abstract = "Silicon-controlled rectifier (SCR) has been used as an effective on-chip ESD protection device in CMOS technology due to the highest ESD robustness. In this work, the waffle layout structure for SCR can achieve smaller parasitic capacitance under the same ESD robustness. With smaller parasitic capacitance, the degradation on RF circuit performance due to ESD protection device can be reduced. The proposed waffle SCR with low parasitic capacitance is suitable for on-chip ESD protection in RF ICs.",

keywords = "Electrostatic discharges (ESD), Radio-frequency integrated circuit (RF IC), Silicon-controlled rectifier (SCR)",

author = "Lin, {Chun Yu} and Ming-Dou Ker",

year = "2007",

month = oct,

day = "2",

doi = "10.1109/RFIC.2007.380991",

language = "English",

isbn = "1424405319",

series = "Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium",

pages = "749--752",

booktitle = "Proceedings of the 2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007",

note = "2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007 ; Conference date: 03-06-2007 Through 05-06-2007",

}

Lin, CY & Ker, M-D 2007, Low-capaeitance SCR with waffle layout structure for on-chip ESD protection in RF ICs. in Proceedings of the 2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007., 4266539, Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium, pp. 749-752, 2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007, Honolulu, HI, United States, 3/06/07. https://doi.org/10.1109/RFIC.2007.380991

Low-capaeitance SCR with waffle layout structure for on-chip ESD protection in RF ICs. / Lin, Chun Yu; Ker, Ming-Dou.
Proceedings of the 2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007. 2007. p. 749-752 4266539 (Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Lin, Chun Yu

AU - Ker, Ming-Dou

PY - 2007/10/2

Y1 - 2007/10/2

N2 - Silicon-controlled rectifier (SCR) has been used as an effective on-chip ESD protection device in CMOS technology due to the highest ESD robustness. In this work, the waffle layout structure for SCR can achieve smaller parasitic capacitance under the same ESD robustness. With smaller parasitic capacitance, the degradation on RF circuit performance due to ESD protection device can be reduced. The proposed waffle SCR with low parasitic capacitance is suitable for on-chip ESD protection in RF ICs.

AB - Silicon-controlled rectifier (SCR) has been used as an effective on-chip ESD protection device in CMOS technology due to the highest ESD robustness. In this work, the waffle layout structure for SCR can achieve smaller parasitic capacitance under the same ESD robustness. With smaller parasitic capacitance, the degradation on RF circuit performance due to ESD protection device can be reduced. The proposed waffle SCR with low parasitic capacitance is suitable for on-chip ESD protection in RF ICs.

KW - Electrostatic discharges (ESD)

KW - Radio-frequency integrated circuit (RF IC)

KW - Silicon-controlled rectifier (SCR)

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BT - Proceedings of the 2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007

T2 - 2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007

Y2 - 3 June 2007 through 5 June 2007

ER -

Low-capaeitance SCR with waffle layout structure for on-chip ESD protection in RF ICs

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