Leakage power analysis of a 90nm FPGA

Tim Tuan*, Bo-Cheng Lai

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

127 Scopus citations

Abstract

Reconfigurable architectures, including FPGAs, are promising solutions for managing increasing design complexity while achieving both performance and flexibility. To support reconfiguration, FPGAs use more transistors per function than fixed-logic solutions, resulting in higher leakage power consumption. Consequently, FPGAs are generally not found in mobile applications. In this work, we analyze the leakage power of a low-cost, 90nm FPGA using detailed device-level simulations. The simulation methodology accounts for design-dependent variations and provides detailed leakage power breakdowns. The analysis quantities the leakage power challenge in FPGAs, and identifies promising approaches for FPGA leakage power reduction.

Original languageEnglish
Pages (from-to)57-60
Number of pages4
JournalProceedings of the Custom Integrated Circuits Conference
DOIs
StatePublished - 2003
EventProceedings of the IEEE 2003 Custom Integrated Circuits Conference - San Jose, CA, United States
Duration: 21 Sep 200324 Sep 2003

Fingerprint

Dive into the research topics of 'Leakage power analysis of a 90nm FPGA'. Together they form a unique fingerprint.

Cite this