Leakage behavior of the quasi-superlattice stack for multilevel charge storage

T. C. Chang; S. T. Yan; Po-Tsun Liu; C. W. Chen; H. H. Wu; S. M. Sze

doi:10.1063/1.1739514

Leakage behavior of the quasi-superlattice stack for multilevel charge storage

T. C. Chang^*, S. T. Yan, Po-Tsun Liu, C. W. Chen, H. H. Wu, S. M. Sze

^*Corresponding author for this work

Department of Photonics

Research output: Contribution to journal › Article › peer-review

Abstract

The leakage mechanism of the quasi-superlattice structure was investigated by current-voltage measurements for multilevel charge storage. It was found that the resonant tunneling occurred at around 2, 2.5 and 7V under a gate voltage swept from 0 to 10 V. It was observed that the the leakage current at room temperature remained low when the 10 V gate voltage was applied. It was also found that a negative differential resistance occurred at different gate biases for the measurements of 50 K.

Original language	English
Pages (from-to)	3687-3689
Number of pages	3
Journal	Applied Physics Letters
Volume	84
Issue number	18
DOIs	https://doi.org/10.1063/1.1739514
State	Published - 3 May 2004

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title = "Leakage behavior of the quasi-superlattice stack for multilevel charge storage",

abstract = "The leakage mechanism of the quasi-superlattice structure was investigated by current-voltage measurements for multilevel charge storage. It was found that the resonant tunneling occurred at around 2, 2.5 and 7V under a gate voltage swept from 0 to 10 V. It was observed that the the leakage current at room temperature remained low when the 10 V gate voltage was applied. It was also found that a negative differential resistance occurred at different gate biases for the measurements of 50 K.",

author = "Chang, {T. C.} and Yan, {S. T.} and Po-Tsun Liu and Chen, {C. W.} and Wu, {H. H.} and Sze, {S. M.}",

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AU - Chang, T. C.

AU - Yan, S. T.

AU - Liu, Po-Tsun

AU - Chen, C. W.

AU - Wu, H. H.

AU - Sze, S. M.

PY - 2004/5/3

Y1 - 2004/5/3

N2 - The leakage mechanism of the quasi-superlattice structure was investigated by current-voltage measurements for multilevel charge storage. It was found that the resonant tunneling occurred at around 2, 2.5 and 7V under a gate voltage swept from 0 to 10 V. It was observed that the the leakage current at room temperature remained low when the 10 V gate voltage was applied. It was also found that a negative differential resistance occurred at different gate biases for the measurements of 50 K.

AB - The leakage mechanism of the quasi-superlattice structure was investigated by current-voltage measurements for multilevel charge storage. It was found that the resonant tunneling occurred at around 2, 2.5 and 7V under a gate voltage swept from 0 to 10 V. It was observed that the the leakage current at room temperature remained low when the 10 V gate voltage was applied. It was also found that a negative differential resistance occurred at different gate biases for the measurements of 50 K.

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U2 - 10.1063/1.1739514

DO - 10.1063/1.1739514

M3 - Article

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VL - 84

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JO - Applied Physics Letters

JF - Applied Physics Letters

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ER -

Leakage behavior of the quasi-superlattice stack for multilevel charge storage

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