Layout Synthesis of Analog Primitive Cells with Variational Autoencoder

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

In analog layout design, the layout design styles of analog building blocks usually have the greatest impact on circuit performance. This paper introduces a new problem formulation and novel methodology for analog building block (a.k.a. primitive cell) layout synthesis. It extracts various building block placement and routing topologies from legacy layouts in the analog design repository, learns topologies through variational autoencoder, and finally synthesizes the building block layouts with the trained model as routing guidance. Experiment results show that the proposed approach can achieve even better performance compared with the conventional analog building block generation or migration approach.

Original languageEnglish
Title of host publicationProceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350332650
DOIs
StatePublished - 2023
Event19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023 - Funchal, Portugal
Duration: 3 Jul 20235 Jul 2023

Publication series

NameProceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023

Conference

Conference19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023
Country/TerritoryPortugal
CityFunchal
Period3/07/235/07/23

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