Latchup in bulk FinFET technology

C. T. Dai; S. H. Chen; D. Linten; M. Scholz; G. Hellings; R. Boschke; J. Karp; M. Hart; G. Groeseneken; Ming-Dou Ker; A. Mocuta; N. Horiguchi

doi:10.1109/IRPS.2017.7936368

Latchup in bulk FinFET technology

C. T. Dai, S. H. Chen, D. Linten, M. Scholz, G. Hellings, R. Boschke, J. Karp, M. Hart, G. Groeseneken, Ming-Dou Ker, A. Mocuta, N. Horiguchi

Institute of Electronics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

16 Scopus citations

Abstract

Latchup (LU) had been considered to be less important in advanced CMOS technologies. However, I/O interface and analog applications can still operate at high voltage (e.g., 1.8V or 3.3V) in sub-20nm bulk FinFET technologies. LU threats are never eliminated and the sensitivity towards LU is increased in bulk FinFET technology.

Original language	English
Title of host publication	2017 International Reliability Physics Symposium, IRPS 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	EL1.1-EL1.3
ISBN (Electronic)	9781509066407
DOIs	https://doi.org/10.1109/IRPS.2017.7936368
State	Published - 30 May 2017
Event	2017 International Reliability Physics Symposium, IRPS 2017 - Monterey, United States Duration: 2 Apr 2017 → 6 Apr 2017

Publication series

Name	IEEE International Reliability Physics Symposium Proceedings
ISSN (Print)	1541-7026

Conference

Conference	2017 International Reliability Physics Symposium, IRPS 2017
Country/Territory	United States
City	Monterey
Period	2/04/17 → 6/04/17

Keywords

Latchup
bulk FinFET
silicon control rectifier (SCR)

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10.1109/IRPS.2017.7936368

Cite this

Dai, C. T., Chen, S. H., Linten, D., Scholz, M., Hellings, G., Boschke, R., Karp, J., Hart, M., Groeseneken, G., Ker, M.-D., Mocuta, A., & Horiguchi, N. (2017). Latchup in bulk FinFET technology. In 2017 International Reliability Physics Symposium, IRPS 2017 (pp. EL1.1-EL1.3). Article 7936368 (IEEE International Reliability Physics Symposium Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IRPS.2017.7936368

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title = "Latchup in bulk FinFET technology",

abstract = "Latchup (LU) had been considered to be less important in advanced CMOS technologies. However, I/O interface and analog applications can still operate at high voltage (e.g., 1.8V or 3.3V) in sub-20nm bulk FinFET technologies. LU threats are never eliminated and the sensitivity towards LU is increased in bulk FinFET technology.",

keywords = "Latchup, bulk FinFET, silicon control rectifier (SCR)",

author = "Dai, {C. T.} and Chen, {S. H.} and D. Linten and M. Scholz and G. Hellings and R. Boschke and J. Karp and M. Hart and G. Groeseneken and Ming-Dou Ker and A. Mocuta and N. Horiguchi",

note = "Publisher Copyright: {\textcopyright} 2017 IEEE.; 2017 International Reliability Physics Symposium, IRPS 2017 ; Conference date: 02-04-2017 Through 06-04-2017",

year = "2017",

month = may,

day = "30",

doi = "10.1109/IRPS.2017.7936368",

language = "English",

series = "IEEE International Reliability Physics Symposium Proceedings",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "EL1.1--EL1.3",

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Dai, CT, Chen, SH, Linten, D, Scholz, M, Hellings, G, Boschke, R, Karp, J, Hart, M, Groeseneken, G, Ker, M-D, Mocuta, A & Horiguchi, N 2017, Latchup in bulk FinFET technology. in 2017 International Reliability Physics Symposium, IRPS 2017., 7936368, IEEE International Reliability Physics Symposium Proceedings, Institute of Electrical and Electronics Engineers Inc., pp. EL1.1-EL1.3, 2017 International Reliability Physics Symposium, IRPS 2017, Monterey, United States, 2/04/17. https://doi.org/10.1109/IRPS.2017.7936368

Latchup in bulk FinFET technology. / Dai, C. T.; Chen, S. H.; Linten, D. et al.
2017 International Reliability Physics Symposium, IRPS 2017. Institute of Electrical and Electronics Engineers Inc., 2017. p. EL1.1-EL1.3 7936368 (IEEE International Reliability Physics Symposium Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Latchup in bulk FinFET technology

AU - Dai, C. T.

AU - Chen, S. H.

AU - Linten, D.

AU - Scholz, M.

AU - Hellings, G.

AU - Boschke, R.

AU - Karp, J.

AU - Hart, M.

AU - Groeseneken, G.

AU - Ker, Ming-Dou

AU - Mocuta, A.

AU - Horiguchi, N.

PY - 2017/5/30

Y1 - 2017/5/30

N2 - Latchup (LU) had been considered to be less important in advanced CMOS technologies. However, I/O interface and analog applications can still operate at high voltage (e.g., 1.8V or 3.3V) in sub-20nm bulk FinFET technologies. LU threats are never eliminated and the sensitivity towards LU is increased in bulk FinFET technology.

AB - Latchup (LU) had been considered to be less important in advanced CMOS technologies. However, I/O interface and analog applications can still operate at high voltage (e.g., 1.8V or 3.3V) in sub-20nm bulk FinFET technologies. LU threats are never eliminated and the sensitivity towards LU is increased in bulk FinFET technology.

KW - Latchup

KW - bulk FinFET

KW - silicon control rectifier (SCR)

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U2 - 10.1109/IRPS.2017.7936368

DO - 10.1109/IRPS.2017.7936368

M3 - Conference contribution

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T3 - IEEE International Reliability Physics Symposium Proceedings

SP - EL1.1-EL1.3

BT - 2017 International Reliability Physics Symposium, IRPS 2017

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2017 International Reliability Physics Symposium, IRPS 2017

Y2 - 2 April 2017 through 6 April 2017

ER -

Latchup in bulk FinFET technology

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