Large array device characteristics improvements

Shao Chang Huang*, Ching Ho Li, Chih Cherng Liao, Li Fan Chen, Chun Chih Chen, Kai Chieh Hsu, Gong Kai Lin, Chih Hsuan Lin, Jian Hsing Lee, Yu Yung Kao, Ke Horng Chen

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

Large array devices are often used for big current driving capabilities in power electronic integrated circuit (IC) applications. Since these structures have big sizes, typical electrostatic discharge protection methodologies cannot be applied in such kind of IC. Otherwise, IC will become too huge to marketing. In this paper, a novel signal control switching architecture for adding large array devices' ESD performances is proposed. Only a little layout area is increased, but a huge electrostatic discharge robustness improvement can be obtained. Moreover, electrical safe operation area characteristics of large array devices are also improved very much with this new scheme. This study is processed in 0.15 μm Bipolar CMOS DMOS (BCD) with silicide technologies.

Original languageEnglish
Article number114353
JournalMicroelectronics Reliability
Volume125
DOIs
StatePublished - Oct 2021

Keywords

  • Electrical safe operation area (eSOA)
  • Electrostatic discharge (ESD)
  • Human body mode (HBM)
  • Large array device (LAD)
  • Machine mode (MM)
  • N-type metal oxide semiconductor transistor (NMOST)
  • Resistor to protect gate oxide (RPO)
  • Signal control switching (SCS)
  • Thermal or 2nd breakdown voltage/current (Vt2/It2)
  • Transmission line pulse generator (TLPG)

Fingerprint

Dive into the research topics of 'Large array device characteristics improvements'. Together they form a unique fingerprint.

Cite this