TY - JOUR
T1 - Junction and device characteristics of gate-last ge p- and n-MOSFETs with ALD-Al2O3 gate dielectric
AU - Cheng, Chao Ching
AU - Chien, Chao-Hsin
AU - Luo, Guang Li
AU - Lin, Ching Lun
AU - Chen, Hung Sen
AU - Liu, Jun Cheng
AU - Kei, Chi Chung
AU - Hsiao, Chien Nan
AU - Chang, Chun Yen
PY - 2009/7/16
Y1 - 2009/7/16
N2 - In this paper, we investigated the characteristics of Ge junction diodes and gate-last p- and n-metal-oxide-semiconductor field-effect transistors with the atomic-layer-deposited- Al2O3 gate dielectrics. The magnitudes of the rectifying ratios for the Ge p+-n and n+-p junctions exceeded three and four orders of magnitude (in the voltage range of ±1 V), respectively, with accompanying reverse leakages of ca. 10-2 and 10-4 A · cm-2, respectively. The site of the primary leakage path, at either the surface periphery or junction area, was determined by the following conditions: 1) the thermal budget during dopant activation, and 2) whether forming gas annealing (FGA) was employed or not. In addition, performing FGA at 300 °C boosted the device on-current, decreased the Al2O3/Ge interface states to 8 × 1011cm-2 · eV-1, and improved the reliability of bias temperature instability. The peak mobility and on/off ratio reached as high as 225 cm2 · V-1 · s-1 and 103, respectively, for the p-FET (W/L = 100 μm/ 4 μm), while these values were less than 100 cm2 · V-1 · s-1 and ca. 103, respectively, for the n-FET (W/L = 100 μm/9 μm). The relatively inferior n-FET performance resulted from the larger source/drain contact resistance, higher surface states scattering, and lower substrate-doping concentration.
AB - In this paper, we investigated the characteristics of Ge junction diodes and gate-last p- and n-metal-oxide-semiconductor field-effect transistors with the atomic-layer-deposited- Al2O3 gate dielectrics. The magnitudes of the rectifying ratios for the Ge p+-n and n+-p junctions exceeded three and four orders of magnitude (in the voltage range of ±1 V), respectively, with accompanying reverse leakages of ca. 10-2 and 10-4 A · cm-2, respectively. The site of the primary leakage path, at either the surface periphery or junction area, was determined by the following conditions: 1) the thermal budget during dopant activation, and 2) whether forming gas annealing (FGA) was employed or not. In addition, performing FGA at 300 °C boosted the device on-current, decreased the Al2O3/Ge interface states to 8 × 1011cm-2 · eV-1, and improved the reliability of bias temperature instability. The peak mobility and on/off ratio reached as high as 225 cm2 · V-1 · s-1 and 103, respectively, for the p-FET (W/L = 100 μm/ 4 μm), while these values were less than 100 cm2 · V-1 · s-1 and ca. 103, respectively, for the n-FET (W/L = 100 μm/9 μm). The relatively inferior n-FET performance resulted from the larger source/drain contact resistance, higher surface states scattering, and lower substrate-doping concentration.
KW - AlO
KW - Forming gas annealing (FGA)
KW - Gate-last metal-oxide-semiconductor field-effect transistor (MOSFET)
KW - Germanium
KW - High-k gate dielectrics
KW - Junction diode
UR - http://www.scopus.com/inward/record.url?scp=68349146497&partnerID=8YFLogxK
U2 - 10.1109/TED.2009.2023948
DO - 10.1109/TED.2009.2023948
M3 - Article
AN - SCOPUS:68349146497
SN - 0018-9383
VL - 56
SP - 1681
EP - 1689
JO - Ieee Transactions On Electron Devices
JF - Ieee Transactions On Electron Devices
IS - 8
ER -