Investigation of Latch-Up Immunity in 0.18-f.1M BCD Process with Deep Trench Isolation

Wen Yung Ho, Ming Dou Ker, Chun Chi Wang, Tsung Yin Chiang, I. Ju Wei

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Deep Trench Isolation (DTI) is a specialized isolation technique employed in the BCD process to mitigate latch-up issues. Unlike junction isolation, which was typically implemented by guard rings, the DTI offers a significant reduction in layout area due to its physical isolation capabilities. This study delves into the impact of DTI on latch-up immunity between 100-V LDMOS in the I/O circuits and the additional guard ring between the 100-V I/O circuits and 5- V internal circuits. The results of this study will be benefit to the high-voltage IC products, that drawn with reduced layout spacing but having high latch-up immunity.

Original languageEnglish
Title of host publication2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350360349
DOIs
StatePublished - 2024
Event2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024 - Hsinchu, Taiwan
Duration: 22 Apr 202425 Apr 2024

Publication series

Name2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024 - Proceedings

Conference

Conference2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024
Country/TerritoryTaiwan
CityHsinchu
Period22/04/2425/04/24

Keywords

  • Deep Trench Isolation (DTI)
  • LDMOS
  • Latch-up

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