TY - GEN
T1 - Investigation of Intrinsic Ferroelectric Switching induced Variation for Scaled FeFETs considering Limited Domain Number
AU - Luo, Yi Chin
AU - Su, Pin
N1 - Publisher Copyright:
© 2022 IEEE.
PY - 2022
Y1 - 2022
N2 - In this work, using Monte-Carlo simulations with nucleation-limited-switching (NLS) model, we investigate the intrinsic ferroelectric switching induced variation for scaled ferroelectric field-effect-transistor (FeFET) nonvolatile memory (NVM) with limited domain number. Our study suggests that, for a given mean value of memory window (MW), adequately reducing the saturated polarization (Ps) of the ferroelectric can mitigate the variability in MW because the impact of polarization charges from each domain flipping can be reduced. In addition, the impacts of other factors such as the equivalent oxide thickness of the interlayer layer on the mean MW and the variability in MW for the FeFET NVM will also be discussed. Our study may provide insights for future high-density FeFET design.
AB - In this work, using Monte-Carlo simulations with nucleation-limited-switching (NLS) model, we investigate the intrinsic ferroelectric switching induced variation for scaled ferroelectric field-effect-transistor (FeFET) nonvolatile memory (NVM) with limited domain number. Our study suggests that, for a given mean value of memory window (MW), adequately reducing the saturated polarization (Ps) of the ferroelectric can mitigate the variability in MW because the impact of polarization charges from each domain flipping can be reduced. In addition, the impacts of other factors such as the equivalent oxide thickness of the interlayer layer on the mean MW and the variability in MW for the FeFET NVM will also be discussed. Our study may provide insights for future high-density FeFET design.
UR - http://www.scopus.com/inward/record.url?scp=85130421079&partnerID=8YFLogxK
U2 - 10.1109/VLSI-TSA54299.2022.9770967
DO - 10.1109/VLSI-TSA54299.2022.9770967
M3 - Conference contribution
AN - SCOPUS:85130421079
T3 - 2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022
BT - 2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022
Y2 - 18 April 2022 through 21 April 2022
ER -