Investigation of hot carrier reliability of ultrathin poly-Si nanobelt junctionless (UTNB-JL) transistors on different underlying insulators

Jen Hong Chang, Chun Chih Chung, Jer Yi Lin, Tien-Sheng Chao

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

In this work, we investigate the hot carrier stress (HCS) of ultrathin poly-Si nanobelt junctionless transistors on different insulator (TEOS and Si3N4). Time exponent n suggests the oxide trap charge is the dominant mechanism. The subthreshold slope (S.S.) is improved by acceptor-like interface states generated after HCS, and different S.S. improvement between JL-O and JL-N is caused by surface roughness of channel films resulting from nucleation during channel deposition in LPCVD step.

Original languageEnglish
Title of host publication2016 5th International Symposium on Next-Generation Electronics, ISNE 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509024391
DOIs
StatePublished - 12 Aug 2016
Event5th International Symposium on Next-Generation Electronics, ISNE 2016 - Hsinchu, Taiwan
Duration: 4 May 20166 May 2016

Publication series

Name2016 5th International Symposium on Next-Generation Electronics, ISNE 2016

Conference

Conference5th International Symposium on Next-Generation Electronics, ISNE 2016
Country/TerritoryTaiwan
CityHsinchu
Period4/05/166/05/16

Keywords

  • hot carrier
  • Junctionless
  • oxide charge
  • ultrathin channel

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