Interface morphology and electrical properties of bonded gaas/gaas wafers at different temperatures

S. C. Chang, Yew-Chuhg Wu, N. Chang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

The microstructure and electrical properties of p-GaAs/n-GaAs bonded interface were investigated. It was observed that when bonding temperature increased from 600 to 800°C, the thickness of oxide layer decreased. Current-voltage characteristic shows typical diode behaviors in these temperature ranges.

Original languageEnglish
Title of host publicationSemiconductor Wafer Bonding 12
Subtitle of host publicationScience, Technology, and Applications
Pages109-112
Number of pages4
Edition7
DOIs
StatePublished - 1 Dec 2012
Event12th International Symposium on Semiconductor Wafer Bonding: Science, Technology, and Applications - ECS Fall 2012 Meeting - Honolulu, HI, United States
Duration: 7 Oct 201212 Oct 2012

Publication series

NameECS Transactions
Number7
Volume50
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Conference

Conference12th International Symposium on Semiconductor Wafer Bonding: Science, Technology, and Applications - ECS Fall 2012 Meeting
Country/TerritoryUnited States
CityHonolulu, HI
Period7/10/1212/10/12

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