TY - GEN
T1 - Integration of millisecond flash anneal on CMOS devices for DRAM manufacturing
AU - Lin, Shian Jyh
AU - Lai, Chao Sung
AU - Chen, Sheng Tsung
AU - Chen, Yi Jung
AU - Huang, Brady
AU - Shih, Neng Tai
AU - Lee, Chung Yuan
AU - Lee, Pei Ing
PY - 2008
Y1 - 2008
N2 - We successfully demonstrate the millisecond flash anneal (MFLA) on a matured DRAM product. The GIDL improvements for array NMOS, periphery N and P MOS are 14.5%, 15%, and 39% respectively. The mechanisms of GIDL impact at different process stages have been reviewed. With MFLA replacement, N and PMOS on-current (Ioff) gains 4.3% and 11.8% respectively. Superior off current (Ioff) reduction for periphery N and PMOS reach 150% and 500% respectively. Vt roll-off, Vt-Ion, Ion-Ioff correlation, overlap capacitance, and drain induced barrier lowering (DIBL) have been reviewed. TEM data show poly grain enlargement and clustering defects staying at different junction depths. This study shows that MFLA has the benefit for lower thermal budget, high dopant activation, and shallow junction for sub-50nm DRAM.
AB - We successfully demonstrate the millisecond flash anneal (MFLA) on a matured DRAM product. The GIDL improvements for array NMOS, periphery N and P MOS are 14.5%, 15%, and 39% respectively. The mechanisms of GIDL impact at different process stages have been reviewed. With MFLA replacement, N and PMOS on-current (Ioff) gains 4.3% and 11.8% respectively. Superior off current (Ioff) reduction for periphery N and PMOS reach 150% and 500% respectively. Vt roll-off, Vt-Ion, Ion-Ioff correlation, overlap capacitance, and drain induced barrier lowering (DIBL) have been reviewed. TEM data show poly grain enlargement and clustering defects staying at different junction depths. This study shows that MFLA has the benefit for lower thermal budget, high dopant activation, and shallow junction for sub-50nm DRAM.
UR - http://www.scopus.com/inward/record.url?scp=49049119276&partnerID=8YFLogxK
U2 - 10.1109/VTSA.2008.4530817
DO - 10.1109/VTSA.2008.4530817
M3 - Conference contribution
AN - SCOPUS:49049119276
SN - 9781424416158
T3 - International Symposium on VLSI Technology, Systems, and Applications, Proceedings
SP - 99
EP - 100
BT - 2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA
T2 - 2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA
Y2 - 21 April 2008 through 23 April 2008
ER -