Input selection encoding for low power multiplexer tree

Hsiao En Chang; Juinn-Dar Huang; Chia I. Chen

doi:10.1109/VDAT.2007.373253

Input selection encoding for low power multiplexer tree

Hsiao En Chang^*, Juinn-Dar Huang, Chia I. Chen

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

8 Scopus citations

Abstract

With the advent of portable devices, power consumption becomes one of the most important considerations in VLSI designs. Multiplexer (MUX) is a basic component massively used in typical VLSI designs. In this paper, we focus on the minimization of switching activities in a MUX tree composed of 2-to-1 MUXes. The key contribution of this paper is: Given the on probabilities and the selection probabilities of input data signals, the proposed heuristic algorithm can properly encode all input data signals such that the power consumption of the resultant MUX tree is minimized. For a 64-to-1 MUX, the experimental results show that a MUX tree encoded by the proposed algorithm consumes 24% less power than a randomly-encoded tree on average.

Original language	English
Title of host publication	2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers
DOIs	https://doi.org/10.1109/VDAT.2007.373253
State	Published - 28 Sep 2007
Event	2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Hsinchu, Taiwan Duration: 25 Apr 2007 → 27 Apr 2007

Publication series

Name	2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers

Conference

Conference	2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007
Country/Territory	Taiwan
City	Hsinchu
Period	25/04/07 → 27/04/07

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10.1109/VDAT.2007.373253

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Chang, H. E., Huang, J.-D., & Chen, C. I. (2007). Input selection encoding for low power multiplexer tree. In 2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers Article 4239445 (2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers). https://doi.org/10.1109/VDAT.2007.373253

@inproceedings{573fb586094849e78ca3935f8a230249,

title = "Input selection encoding for low power multiplexer tree",

abstract = "With the advent of portable devices, power consumption becomes one of the most important considerations in VLSI designs. Multiplexer (MUX) is a basic component massively used in typical VLSI designs. In this paper, we focus on the minimization of switching activities in a MUX tree composed of 2-to-1 MUXes. The key contribution of this paper is: Given the on probabilities and the selection probabilities of input data signals, the proposed heuristic algorithm can properly encode all input data signals such that the power consumption of the resultant MUX tree is minimized. For a 64-to-1 MUX, the experimental results show that a MUX tree encoded by the proposed algorithm consumes 24% less power than a randomly-encoded tree on average.",

author = "Chang, {Hsiao En} and Juinn-Dar Huang and Chen, {Chia I.}",

year = "2007",

month = sep,

day = "28",

doi = "10.1109/VDAT.2007.373253",

language = "English",

isbn = "1424405831",

series = "2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers",

booktitle = "2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers",

note = "2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 ; Conference date: 25-04-2007 Through 27-04-2007",

}

Chang, HE, Huang, J-D & Chen, CI 2007, Input selection encoding for low power multiplexer tree. in 2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers., 4239445, 2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers, 2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007, Hsinchu, Taiwan, 25/04/07. https://doi.org/10.1109/VDAT.2007.373253

Input selection encoding for low power multiplexer tree. / Chang, Hsiao En; Huang, Juinn-Dar; Chen, Chia I.
2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers. 2007. 4239445 (2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Chang, Hsiao En

AU - Huang, Juinn-Dar

AU - Chen, Chia I.

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N2 - With the advent of portable devices, power consumption becomes one of the most important considerations in VLSI designs. Multiplexer (MUX) is a basic component massively used in typical VLSI designs. In this paper, we focus on the minimization of switching activities in a MUX tree composed of 2-to-1 MUXes. The key contribution of this paper is: Given the on probabilities and the selection probabilities of input data signals, the proposed heuristic algorithm can properly encode all input data signals such that the power consumption of the resultant MUX tree is minimized. For a 64-to-1 MUX, the experimental results show that a MUX tree encoded by the proposed algorithm consumes 24% less power than a randomly-encoded tree on average.

AB - With the advent of portable devices, power consumption becomes one of the most important considerations in VLSI designs. Multiplexer (MUX) is a basic component massively used in typical VLSI designs. In this paper, we focus on the minimization of switching activities in a MUX tree composed of 2-to-1 MUXes. The key contribution of this paper is: Given the on probabilities and the selection probabilities of input data signals, the proposed heuristic algorithm can properly encode all input data signals such that the power consumption of the resultant MUX tree is minimized. For a 64-to-1 MUX, the experimental results show that a MUX tree encoded by the proposed algorithm consumes 24% less power than a randomly-encoded tree on average.

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BT - 2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers

T2 - 2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007

Y2 - 25 April 2007 through 27 April 2007

ER -

Input selection encoding for low power multiplexer tree

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