Abstract
In many sensor applications, a high-resolution analog-to-digital converter (ADC) is a key block. The use of an incremental delta-sigma ADC (IADC) is often well suited for such applications. While the energy-efficiency of IADCs has improved by several orders of magnitude over the past decade, the implementation of high performance IADCs, especially in battery-powered systems, is still challenging. This paper presents a tutorial review on energy-efficient IADCs and addresses the progress in this area. This paper describes the fundamentals of IADCs and energy-efficient hybrid IADC architectures. Various design techniques for improving the energy-efficiency of the IADCs are described. This paper is intended to serve as a starting point for the development of a new energy-efficient IADC.
| Original language | English |
|---|---|
| Article number | 9264222 |
| Pages (from-to) | 4161-4173 |
| Number of pages | 13 |
| Journal | IEEE Transactions on Circuits and Systems I: Regular Papers |
| Volume | 67 |
| Issue number | 12 |
| DOIs | |
| State | Published - Dec 2020 |
Keywords
- Analog-to-digital converter (ADC)
- and sensor interface
- chopping
- decimation filter
- energy-efficiency
- energy-efficient amplifier
- FIR-DAC
- incremental ADC (IADC)
- incremental delta-sigma (ΔΣ) modulator
- integrator slicing
- negative-R assisted integrator
