Incorporating yttrium into a GeO interfacial layer with HfO2-based gate stack on Ge

Chen-Han Chou, Yu Hong Lu, Yi He Tsai, An Shih Shih, Wen Kuan Yeh, Chao Hsin Chien*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

4 Scopus citations


In this study, we employed the electrical and material properties of various interfacial layers (ILs) such as GeO and YGeO on a Ge substrate. First, capacitors using various ILs with HfO2-based gate stacks were developed. The capacitor using YGeO IL exhibited a low interface state density (Dit) of 2.5 × 1011 eV-1cm-2 and an equivalent oxide thickness of 1.8 nm. Next, a reliability test for constant voltage stress was conducted for further studying the YGeO ILs. The capacitors with YGeO ILs presented higher immunity for Dit degradation. Further, to understand the material properties of various ILs, a simple experiment on capping a Si chip on GeO or YGeO/Ge samples through high-temperature annealing was conducted. We observed that Ge and GeO vapors can be absorbed by Si and detected through X-ray photoelectron spectroscopy (XPS). XPS spectra of Si chips capped on GeO IL presented obvious features of Ge and GeO through annealing at 500°C; however, the XPS spectra of Si chips capped on YGeO IL presented no features, indicating that YGeO ILs had higher thermal stability than GeO ILs. To further analyze the HfO2-based gate stacks with various ILs, Ge diffusion into a high-κ HfO2 layer was investigated through angle-resolved XPS. We observed that YGeO ILs with HfO2-based gate stacks can reduce Ge diffusion into a HfO2 layer.

Original languageEnglish
Pages (from-to)N15-N19
Number of pages5
JournalECS Journal of Solid State Science and Technology
Issue number2
StatePublished - 19 Jan 2018


Dive into the research topics of 'Incorporating yttrium into a GeO interfacial layer with HfO2-based gate stack on Ge'. Together they form a unique fingerprint.

Cite this