Improving Performance and Breakdown Voltage in Normally-Off GaN Recessed Gate MIS-HEMTs Using Atomic Layer Etching and Gate Field Plate for High-Power Device Applications

An Chen Liu, Po Tsung Tu, Hsin Chu Chen*, Yung Yu Lai, Po Chun Yeh, Hao Chung Kuo*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

A typical method for normally-off operation, the metal–insulator–semiconductor-high electron mobility transistor (MIS-HEMT) has been investigated. Among various approaches, gate recessed MIS-HEMT have demonstrated a high gate voltage sweep and low leakage current characteristics. Despite their high performance, obtaining low-damage techniques in gate recess processing has so far proven too challenging. In this letter, we demonstrate a high current density and high breakdown down voltage of a MIS-HEMT with a recessed gate by the low damage gate recessed etching of atomic layer etching (ALE) technology. After the remaining 3.7 nm of the AlGaN recessed gate was formed, the surface roughness (Ra of 0.40 nm) was almost the same as the surface without ALE (no etching) as measured by atomic force microscopy (AFM). Furthermore, the devices demonstrate state-of-the-art characteristics with a competitive maximum drain current of 608 mA/mm at a VG of 6 V and a threshold voltage of +2.0 V. The devices also show an on/off current ratio of 109 and an off-state hard breakdown voltage of 1190 V. The low damage of ALE technology was introduced into the MIS-HEMT with the recessed gate, which effectively reduced trapping states at the interface to obtain the low on-resistance (Ron) of 6.8 Ω·mm and high breakdown voltage performance.

Original languageEnglish
Article number1582
JournalMicromachines
Volume14
Issue number8
DOIs
StatePublished - Aug 2023

Keywords

  • atomic layer etching (ALE)
  • gate surface roughness
  • MIS-HEMT

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