Improvement on ESD robustness of lateral DMOS in high-voltage CMOS ICs by body current injection

Wen Yi Chen*, Ming-Dou Ker, Yeh Ning Jou, Yeh Jen Huang, Geeng Lih Lin

*Corresponding author for this work

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    12 Scopus citations

    Abstract

    With the waffle layout style, body-injected technique implemented by body current injection on n-channel lateral DMOS (nLDMOS) has been successfully verified in a 0.5-μm 16-V BCD process. The TLP measured results confirmed that the secondary breakdown current (It2) of waffle nLDMOS can be significantly increased by the body current injection with the corresponding trigger circuit design. The latchup immunity of power-rail ESD protection circuit can be further improved by the stacked configuration with multiple nLDMOS devices in HV ICs.

    Original languageEnglish
    Title of host publication2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
    Pages385-388
    Number of pages4
    DOIs
    StatePublished - 26 Oct 2009
    Event2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 - Taipei, Taiwan
    Duration: 24 May 200927 May 2009

    Publication series

    NameProceedings - IEEE International Symposium on Circuits and Systems
    ISSN (Print)0271-4310

    Conference

    Conference2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
    Country/TerritoryTaiwan
    CityTaipei
    Period24/05/0927/05/09

    Fingerprint

    Dive into the research topics of 'Improvement on ESD robustness of lateral DMOS in high-voltage CMOS ICs by body current injection'. Together they form a unique fingerprint.

    Cite this