@inproceedings{597f2a1ecc264c3f9051328b4baf5a5a,
title = "Implantation free GAA double spacer poly-Si nanowires channel junctionless FETs with sub-1V gate operation and near ideal subthreshold swing",
abstract = "The implantation free gate-all-around (GAA) double spacer poly-Si nanowires (NWs) channel junctionless (JL) FETs (GAA DS-NW JL-FETs) have been successfully fabricated and demonstrated in the category of poly-Si NW FETs for the first time. We have scaled down the NW dimension (DNW)-length (Lnw) × width (WNW) × thickness (TNW)-to 80nm×13nm×3nm by novel double spacer NW (DS-NW) processes without use of electron beam (e-beam) lithography tools. GAA DS-NW JL-FETs show good electrical characteristics: near ideal subthreshold swing (S.S.) ∼ 61 mV/dec., steep driving swing (D.S.) ∼ 82mV/dec., and sub-1V gate operation without implantation processes for future three-dimensional integrated circuits (3-D ICs), system-on-panel (SOP) applications.",
author = "Kuo, {Po Yi} and Lin, {Jer Yi} and Tien-Sheng Chao",
year = "2015",
month = feb,
day = "16",
doi = "10.1109/IEDM.2015.7409639",
language = "English",
series = "Technical Digest - International Electron Devices Meeting, IEDM",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "6.3.1--6.3.4",
booktitle = "2015 IEEE International Electron Devices Meeting, IEDM 2015",
address = "United States",
note = "null ; Conference date: 07-12-2015 Through 09-12-2015",
}