Implantable stimulator for epileptic seizure suppression with loading impedance adaptability

Chun Yu Lin; Wei Ling Chen; Ming-Dou Ker

doi:10.1109/TBCAS.2012.2200481

Implantable stimulator for epileptic seizure suppression with loading impedance adaptability

Chun Yu Lin, Wei Ling Chen, Ming-Dou Ker

Research output: Contribution to journal › Article › peer-review

27 Scopus citations

Abstract

The implantable stimulator for epileptic seizure suppression with loading impedance adaptability was proposed in this work. The stimulator consisted of the high voltage generator, output driver, adaptor, and switches, can constantly provide the required 40-μ A stimulus currents, as the loading impedance varied within 10 kΩ-300 kΩ. The performances of this design have been successfully verified in silicon chip fabricated by a 0.35-μm 3.3-V/24-V CMOS process. The power consumption of this work was only 1.1 mW-1.4 mW. The animal test results with the fabricated chip of proposed design have successfully verified in the Long-Evans rats with epileptic seizures.

Original language	English
Article number	6231703
Pages (from-to)	196-203
Number of pages	8
Journal	IEEE Transactions on Biomedical Circuits and Systems
Volume	7
Issue number	2
DOIs	https://doi.org/10.1109/TBCAS.2012.2200481
State	Published - 1 Jan 2013

Keywords

Adaptability
epilepsy
epileptic seizure suppression
implantable device
stimulator

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10.1109/TBCAS.2012.2200481

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title = "Implantable stimulator for epileptic seizure suppression with loading impedance adaptability",

abstract = "The implantable stimulator for epileptic seizure suppression with loading impedance adaptability was proposed in this work. The stimulator consisted of the high voltage generator, output driver, adaptor, and switches, can constantly provide the required 40-μ A stimulus currents, as the loading impedance varied within 10 kΩ-300 kΩ. The performances of this design have been successfully verified in silicon chip fabricated by a 0.35-μm 3.3-V/24-V CMOS process. The power consumption of this work was only 1.1 mW-1.4 mW. The animal test results with the fabricated chip of proposed design have successfully verified in the Long-Evans rats with epileptic seizures.",

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author = "Lin, {Chun Yu} and Chen, {Wei Ling} and Ming-Dou Ker",

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AU - Ker, Ming-Dou

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N2 - The implantable stimulator for epileptic seizure suppression with loading impedance adaptability was proposed in this work. The stimulator consisted of the high voltage generator, output driver, adaptor, and switches, can constantly provide the required 40-μ A stimulus currents, as the loading impedance varied within 10 kΩ-300 kΩ. The performances of this design have been successfully verified in silicon chip fabricated by a 0.35-μm 3.3-V/24-V CMOS process. The power consumption of this work was only 1.1 mW-1.4 mW. The animal test results with the fabricated chip of proposed design have successfully verified in the Long-Evans rats with epileptic seizures.

AB - The implantable stimulator for epileptic seizure suppression with loading impedance adaptability was proposed in this work. The stimulator consisted of the high voltage generator, output driver, adaptor, and switches, can constantly provide the required 40-μ A stimulus currents, as the loading impedance varied within 10 kΩ-300 kΩ. The performances of this design have been successfully verified in silicon chip fabricated by a 0.35-μm 3.3-V/24-V CMOS process. The power consumption of this work was only 1.1 mW-1.4 mW. The animal test results with the fabricated chip of proposed design have successfully verified in the Long-Evans rats with epileptic seizures.

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Implantable stimulator for epileptic seizure suppression with loading impedance adaptability

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