Impacts of work function variation and line edge roughness on hybrid TFET-MOSFET monolithic 3D SRAMs

Jian Hao Wang; Pin Su; Ching Te Chuang

doi:10.1109/VLSI-TSA.2017.7942455

Impacts of work function variation and line edge roughness on hybrid TFET-MOSFET monolithic 3D SRAMs

Jian Hao Wang, Pin Su, Ching Te Chuang

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

We analyze the variability of 7T hybrid TFET-MOSFET SRAM and 8T MOSFET SRAM in monolithic 3D technology operating at ultra-low voltage. The impacts of work function variation (WFV) and line edge roughness (LER) on SRAM cell stability, leakage power and performance are investigated and compared using 3D atomistic TCAD mixed-mode Monte-Carlo simulations. The results indicate that WFV and LER have different impacts on read disturb and V_write,0, which dominate SRAM stability and is determined by the distinct current drive of TFET and MOSFET. The performance is influenced by the different variations of gate capacitance (C_g) under WFV and LER.

Original language	English
Title of host publication	2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781509058051
DOIs	https://doi.org/10.1109/VLSI-TSA.2017.7942455
State	Published - 7 Jun 2017
Event	2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017 - Hsinchu, Taiwan Duration: 24 Apr 2017 → 27 Apr 2017

Publication series

Name	2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017

Conference

Conference	2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017
Country/Territory	Taiwan
City	Hsinchu
Period	24/04/17 → 27/04/17

Access to Document

10.1109/VLSI-TSA.2017.7942455

Cite this

Wang, J. H., Su, P., & Chuang, C. T. (2017). Impacts of work function variation and line edge roughness on hybrid TFET-MOSFET monolithic 3D SRAMs. In 2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017 Article 7942455 (2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-TSA.2017.7942455

Wang, Jian Hao ; Su, Pin ; Chuang, Ching Te. / Impacts of work function variation and line edge roughness on hybrid TFET-MOSFET monolithic 3D SRAMs. 2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017. Institute of Electrical and Electronics Engineers Inc., 2017. (2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017).

@inproceedings{577cf2e7f2184db59631fa70cf251ed1,

title = "Impacts of work function variation and line edge roughness on hybrid TFET-MOSFET monolithic 3D SRAMs",

abstract = "We analyze the variability of 7T hybrid TFET-MOSFET SRAM and 8T MOSFET SRAM in monolithic 3D technology operating at ultra-low voltage. The impacts of work function variation (WFV) and line edge roughness (LER) on SRAM cell stability, leakage power and performance are investigated and compared using 3D atomistic TCAD mixed-mode Monte-Carlo simulations. The results indicate that WFV and LER have different impacts on read disturb and Vwrite,0, which dominate SRAM stability and is determined by the distinct current drive of TFET and MOSFET. The performance is influenced by the different variations of gate capacitance (Cg) under WFV and LER.",

author = "Wang, {Jian Hao} and Pin Su and Chuang, {Ching Te}",

year = "2017",

month = jun,

day = "7",

doi = "10.1109/VLSI-TSA.2017.7942455",

language = "English",

series = "2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017",

address = "美國",

note = "2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017 ; Conference date: 24-04-2017 Through 27-04-2017",

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Wang, JH, Su, P & Chuang, CT 2017, Impacts of work function variation and line edge roughness on hybrid TFET-MOSFET monolithic 3D SRAMs. in 2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017., 7942455, 2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017, Institute of Electrical and Electronics Engineers Inc., 2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017, Hsinchu, Taiwan, 24/04/17. https://doi.org/10.1109/VLSI-TSA.2017.7942455

Impacts of work function variation and line edge roughness on hybrid TFET-MOSFET monolithic 3D SRAMs. / Wang, Jian Hao; Su, Pin; Chuang, Ching Te.
2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017. Institute of Electrical and Electronics Engineers Inc., 2017. 7942455 (2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Wang, Jian Hao

AU - Su, Pin

AU - Chuang, Ching Te

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N2 - We analyze the variability of 7T hybrid TFET-MOSFET SRAM and 8T MOSFET SRAM in monolithic 3D technology operating at ultra-low voltage. The impacts of work function variation (WFV) and line edge roughness (LER) on SRAM cell stability, leakage power and performance are investigated and compared using 3D atomistic TCAD mixed-mode Monte-Carlo simulations. The results indicate that WFV and LER have different impacts on read disturb and Vwrite,0, which dominate SRAM stability and is determined by the distinct current drive of TFET and MOSFET. The performance is influenced by the different variations of gate capacitance (Cg) under WFV and LER.

AB - We analyze the variability of 7T hybrid TFET-MOSFET SRAM and 8T MOSFET SRAM in monolithic 3D technology operating at ultra-low voltage. The impacts of work function variation (WFV) and line edge roughness (LER) on SRAM cell stability, leakage power and performance are investigated and compared using 3D atomistic TCAD mixed-mode Monte-Carlo simulations. The results indicate that WFV and LER have different impacts on read disturb and Vwrite,0, which dominate SRAM stability and is determined by the distinct current drive of TFET and MOSFET. The performance is influenced by the different variations of gate capacitance (Cg) under WFV and LER.

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T3 - 2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017

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Wang JH, Su P, Chuang CT. Impacts of work function variation and line edge roughness on hybrid TFET-MOSFET monolithic 3D SRAMs. In 2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017. Institute of Electrical and Electronics Engineers Inc. 2017. 7942455. (2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017). doi: 10.1109/VLSI-TSA.2017.7942455

Impacts of work function variation and line edge roughness on hybrid TFET-MOSFET monolithic 3D SRAMs

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