Impacts of hole trapping on the NBTI degradation and recovery in PMOS devices

Horng-Chih Lin, D. Y. Lee, S. C. Ou, Chao-Hsin Chien, T. Y. Huang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Scopus citations

Abstract

In this paper, impacts of hole trapping on the negative bias temperature instability (NBTI) degradation and recovery in PMOS devices was investigated. Dual-gate p- and n-channel MOSFETs were fabricated using a standard CMOS twin-well technology.

Original languageEnglish
Title of host publicationExtended Abstracts of International Workshop on Gate Insulator, IWGI 2003
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages76-79
Number of pages4
ISBN (Electronic)4891140372, 9784891140373
DOIs
StatePublished - 1 Jan 2003
EventInternational Workshop on Gate Insulator, IWGI 2003 - Tokyo, Japan
Duration: 6 Nov 20037 Nov 2003

Publication series

NameExtended Abstracts of International Workshop on Gate Insulator, IWGI 2003

Conference

ConferenceInternational Workshop on Gate Insulator, IWGI 2003
Country/TerritoryJapan
CityTokyo
Period6/11/037/11/03

Keywords

  • CMOS technology
  • Degradation
  • Dielectrics
  • Interface states
  • MOS devices
  • Niobium compounds
  • Nitrogen
  • Stress
  • Temperature
  • Titanium compounds

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