Impacts of gate structure on dynamic threshold SOI nMOSFETs

Wen Cheng Lo; Sun Jay Chang; Chun Yen Chang; Tien-Sheng Chao

doi:10.1109/LED.2002.801334

Impacts of gate structure on dynamic threshold SOI nMOSFETs

Wen Cheng Lo^*, Sun Jay Chang, Chun Yen Chang, Tien-Sheng Chao

^*Corresponding author for this work

Department of Electrophysics

Research output: Contribution to journal › Article › peer-review

17 Scopus citations

Abstract

The effects of different substrate-contact structures (T-gate and H-gate) dynamic threshold voltage silicon-on-insulator (SOI) nMOSFETs (DTMOS) have been investigated. It is found that H-gate structure devices have higher driving current than T-gate under DTMOS-mode operation. This is because H-gate SOI devices have larger body effect factor (γ), inducing a lager reduction of threshold voltage. Besides, it is found that drain-induced-barrier-lowering (DIBL) is dramatically reduced for both T-gate and H-gate structure devices when devices are operated under DTMOS-mode.

Original language	English
Pages (from-to)	497-499
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	23
Issue number	8
DOIs	https://doi.org/10.1109/LED.2002.801334
State	Published - 1 Aug 2002

Keywords

Dynamic threshold MOS (DTMOS)
H-gate
Silicon-on-insulator (SOI)
T-gate

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10.1109/LED.2002.801334

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title = "Impacts of gate structure on dynamic threshold SOI nMOSFETs",

abstract = "The effects of different substrate-contact structures (T-gate and H-gate) dynamic threshold voltage silicon-on-insulator (SOI) nMOSFETs (DTMOS) have been investigated. It is found that H-gate structure devices have higher driving current than T-gate under DTMOS-mode operation. This is because H-gate SOI devices have larger body effect factor (γ), inducing a lager reduction of threshold voltage. Besides, it is found that drain-induced-barrier-lowering (DIBL) is dramatically reduced for both T-gate and H-gate structure devices when devices are operated under DTMOS-mode.",

keywords = "Dynamic threshold MOS (DTMOS), H-gate, Silicon-on-insulator (SOI), T-gate",

author = "Lo, {Wen Cheng} and Chang, {Sun Jay} and Chang, {Chun Yen} and Tien-Sheng Chao",

year = "2002",

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AU - Lo, Wen Cheng

AU - Chang, Sun Jay

AU - Chang, Chun Yen

AU - Chao, Tien-Sheng

PY - 2002/8/1

Y1 - 2002/8/1

N2 - The effects of different substrate-contact structures (T-gate and H-gate) dynamic threshold voltage silicon-on-insulator (SOI) nMOSFETs (DTMOS) have been investigated. It is found that H-gate structure devices have higher driving current than T-gate under DTMOS-mode operation. This is because H-gate SOI devices have larger body effect factor (γ), inducing a lager reduction of threshold voltage. Besides, it is found that drain-induced-barrier-lowering (DIBL) is dramatically reduced for both T-gate and H-gate structure devices when devices are operated under DTMOS-mode.

AB - The effects of different substrate-contact structures (T-gate and H-gate) dynamic threshold voltage silicon-on-insulator (SOI) nMOSFETs (DTMOS) have been investigated. It is found that H-gate structure devices have higher driving current than T-gate under DTMOS-mode operation. This is because H-gate SOI devices have larger body effect factor (γ), inducing a lager reduction of threshold voltage. Besides, it is found that drain-induced-barrier-lowering (DIBL) is dramatically reduced for both T-gate and H-gate structure devices when devices are operated under DTMOS-mode.

KW - Dynamic threshold MOS (DTMOS)

KW - H-gate

KW - Silicon-on-insulator (SOI)

KW - T-gate

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DO - 10.1109/LED.2002.801334

M3 - Article

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VL - 23

SP - 497

EP - 499

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

IS - 8

ER -

Impacts of gate structure on dynamic threshold SOI nMOSFETs

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Keywords

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