Impact of mosfet gate-oxide reliability on CMOS operational amplifiers in a 130-nm low-voltage CMOS process

Jung Sheng Chen*, Ming-Dou Ker

*Corresponding author for this work

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    7 Scopus citations

    Abstract

    The effects of the gate-oxide reliability of MOSFETs on operational amplifiers were investigated with the two-stage and folded-cascode structures in a 130-nm low-voltage CMOS process. The tested operating conditions include unity-gain buffer (close-loop configuration) and comparator (open-loop configuration) under different input frequencies and signals. After overstress, the small-signal parameters, such as small-signal gain, unity-gain frequency, and phase margin, were measured to verify the impact of gate-oxide reliability on circuit performances of the operational amplifier. The gate-oxide reliability can be improved by the stacked configuration in the operational amplifier with folded-cascode structure. A simple equivalent device model of gate-oxide reliability for CMOS devices in analog circuits was investigated and simulated.

    Original languageEnglish
    Title of host publication2005 IEEE International Reliability Physics Symposium Proceedings, 43rd Annual
    Pages423-430
    Number of pages8
    DOIs
    StatePublished - 2005
    Event2005 IEEE International Reliability Physics Symposium Proceedings, 43rd Annual - San Jose, CA, United States
    Duration: 17 Apr 200521 Apr 2005

    Publication series

    NameIEEE International Reliability Physics Symposium Proceedings
    ISSN (Print)1541-7026

    Conference

    Conference2005 IEEE International Reliability Physics Symposium Proceedings, 43rd Annual
    Country/TerritoryUnited States
    CitySan Jose, CA
    Period17/04/0521/04/05

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