Impact of gate dielectrics and oxygen annealing on tin-oxide thin-film transistors

Chia Wen Zhong; Horng-Chih Lin; Jung Ruey Tsai; Kou Chen Liu; Tiao Yuan Huang

doi:10.7567/JJAP.55.04EG02

Impact of gate dielectrics and oxygen annealing on tin-oxide thin-film transistors

Chia Wen Zhong, Horng-Chih Lin, Jung Ruey Tsai, Kou Chen Liu, Tiao Yuan Huang

Institute of Electronics

Research output: Contribution to journal › Article › peer-review

11 Scopus citations

Abstract

In this work, we study the impact of gate dielectrics on the characteristics of bottom-gated tin-oxide thin-film transistors annealed in an oxygen ambience at 300 °C for various periods. SiO₂, HfO₂, and Al₂O₃ are employed as the gate dielectric in the test devices. The results show that the devices will start exhibiting p-type conduction behavior as the annealing reaches a specific time period which is closely related to the underlying gate dielectric, and the device characteristics can be improved as the annealing proceeds further. Nonetheless, a prolonged annealing may cause degradation of the devices. High hole mobility (3.33 cm2V%1 s%1), low threshold voltage (1.95 V), and excellent Ion/Ioff ratio (>104) are achieved on SnO TFTs with a SiO₂ gate dielectric after an annealing of 30 min.

Original language	English
Article number	04EG02
Journal	Japanese journal of applied physics
Volume	55
Issue number	4
DOIs	https://doi.org/10.7567/JJAP.55.04EG02
State	Published - Apr 2016

Access to Document

10.7567/JJAP.55.04EG02

Cite this

@article{0e6a410f18b94b5f802a6384790304eb,

title = "Impact of gate dielectrics and oxygen annealing on tin-oxide thin-film transistors",

abstract = "In this work, we study the impact of gate dielectrics on the characteristics of bottom-gated tin-oxide thin-film transistors annealed in an oxygen ambience at 300 °C for various periods. SiO2, HfO2, and Al2O3 are employed as the gate dielectric in the test devices. The results show that the devices will start exhibiting p-type conduction behavior as the annealing reaches a specific time period which is closely related to the underlying gate dielectric, and the device characteristics can be improved as the annealing proceeds further. Nonetheless, a prolonged annealing may cause degradation of the devices. High hole mobility (3.33 cm2V%1 s%1), low threshold voltage (1.95 V), and excellent Ion/Ioff ratio (>104) are achieved on SnO TFTs with a SiO2 gate dielectric after an annealing of 30 min.",

author = "Zhong, {Chia Wen} and Horng-Chih Lin and Tsai, {Jung Ruey} and Liu, {Kou Chen} and Huang, {Tiao Yuan}",

note = "Publisher Copyright: {\textcopyright} 2016 The Japan Society of Applied Physics.",

year = "2016",

month = apr,

doi = "10.7567/JJAP.55.04EG02",

language = "English",

volume = "55",

journal = "Japanese journal of applied physics",

issn = "0021-4922",

publisher = "Japan Society of Applied Physics",

number = "4",

}

TY - JOUR

T1 - Impact of gate dielectrics and oxygen annealing on tin-oxide thin-film transistors

AU - Zhong, Chia Wen

AU - Lin, Horng-Chih

AU - Tsai, Jung Ruey

AU - Liu, Kou Chen

AU - Huang, Tiao Yuan

PY - 2016/4

Y1 - 2016/4

N2 - In this work, we study the impact of gate dielectrics on the characteristics of bottom-gated tin-oxide thin-film transistors annealed in an oxygen ambience at 300 °C for various periods. SiO2, HfO2, and Al2O3 are employed as the gate dielectric in the test devices. The results show that the devices will start exhibiting p-type conduction behavior as the annealing reaches a specific time period which is closely related to the underlying gate dielectric, and the device characteristics can be improved as the annealing proceeds further. Nonetheless, a prolonged annealing may cause degradation of the devices. High hole mobility (3.33 cm2V%1 s%1), low threshold voltage (1.95 V), and excellent Ion/Ioff ratio (>104) are achieved on SnO TFTs with a SiO2 gate dielectric after an annealing of 30 min.

AB - In this work, we study the impact of gate dielectrics on the characteristics of bottom-gated tin-oxide thin-film transistors annealed in an oxygen ambience at 300 °C for various periods. SiO2, HfO2, and Al2O3 are employed as the gate dielectric in the test devices. The results show that the devices will start exhibiting p-type conduction behavior as the annealing reaches a specific time period which is closely related to the underlying gate dielectric, and the device characteristics can be improved as the annealing proceeds further. Nonetheless, a prolonged annealing may cause degradation of the devices. High hole mobility (3.33 cm2V%1 s%1), low threshold voltage (1.95 V), and excellent Ion/Ioff ratio (>104) are achieved on SnO TFTs with a SiO2 gate dielectric after an annealing of 30 min.

UR - http://www.scopus.com/inward/record.url?scp=84963647503&partnerID=8YFLogxK

U2 - 10.7567/JJAP.55.04EG02

DO - 10.7567/JJAP.55.04EG02

M3 - Article

AN - SCOPUS:84963647503

SN - 0021-4922

VL - 55

JO - Japanese journal of applied physics

JF - Japanese journal of applied physics

IS - 4

M1 - 04EG02

ER -

Impact of gate dielectrics and oxygen annealing on tin-oxide thin-film transistors

Abstract

Access to Document

Other files and links

Fingerprint

Cite this