Highly Reliable, Scalable, and High-Yield HfZrOxFRAM by Barrier Layer Engineering and Post-Metal Annealing

Yu De Lin*, Po Chun Yeh, Jheng Yang Dai, Jian Wei Su, Hsin Hui Huang, Chen Yi Cho, Ying Tsan Tang, Tuo Hung Hou, Shyh Shyuan Sheu, Wei Chung Lo, Shih Chieh Chang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A highly reliable HfZrOx FRAM technology showing endurance up to 10 {12} cycles and 10 {10} cycles at 27°C and 120°C, respectively, in a scaled cell area of 0.36 mu mathrm{m}{2} has been demonstrated. The improved endurance is accomplished through barrier layer engineering of inserting TiON and 400°C post-metal annealing. Furthermore, wake-up-free 4 Kb 1T1C FRAM test chips show an extremely high initial yield of >98% across a wafer. The robust high-temperature reliability and high-yield array demonstrate high promise for future applications in automobile electronics.

Original languageEnglish
Title of host publication2022 International Electron Devices Meeting, IEDM 2022
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages3211-3214
Number of pages4
ISBN (Electronic)9781665489591
DOIs
StatePublished - 2022
Event2022 International Electron Devices Meeting, IEDM 2022 - San Francisco, United States
Duration: 3 Dec 20227 Dec 2022

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
Volume2022-December
ISSN (Print)0163-1918

Conference

Conference2022 International Electron Devices Meeting, IEDM 2022
Country/TerritoryUnited States
CitySan Francisco
Period3/12/227/12/22

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