High-reliability and low-noise amorphous-silicon gate with a novel clock-driving methodology

Chien Hsueh Chiang, Yiming Li*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

5 Scopus citations


In this paper, for the first time, a novel amorphous-silicon thin-film transistor gate drive circuit and its successfully improved dynamic characteristics are presented. Not only was the output ripple suppressed; the rate of threshold voltage shift was also reduced by up to 20%. About 50% power-saving was also estimated. The amorphous-silicon gate driver circuit was further fabricated, and the measured results show the high practicability of the achieved design.

Original languageEnglish
Pages (from-to)5-11
Number of pages7
JournalJournal of Information Display
Issue number1
StatePublished - Jan 2014


  • ASG
  • display circuit
  • low noise
  • new clock driving
  • power-saving
  • threshold voltage shift


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