@inproceedings{559e1cd50c7a4c9290720ab2ec8762e7,
title = "High performance silicon N-channel gate-all-around junctionless field effect transistors by strain technology",
abstract = "In this paper, strain effects on silicon n-channel gate-all-around (GAA) jucntionless field effect transistor (JLFET) are studied. By using tensile strain SiN layer, drive currents of the JLFETs show enhancement of up to 42%. The high performance strained JLFETs exhibit superior gate control (Ion/Ioff >109) and ideal S.S. (65 mV/dec.) as a channel width scales down to 20 nm. Drive currents and leakage currents are improved simultaneously after inducing strain technology.",
author = "Sung, {P. J.} and Cho, {T. C.} and Chen, {P. C.} and Hou, {F. J.} and Lai, {C. H.} and Lee, {Y. J.} and Yi-Ming Li and S. Samukawa and Tien-Sheng Chao and Wu, {W. F.} and Yeh, {W. K.}",
note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 16th IEEE International Conference on Nanotechnology - IEEE NANO 2016 ; Conference date: 22-08-2016 Through 25-08-2016",
year = "2016",
month = nov,
day = "21",
doi = "10.1109/NANO.2016.7751473",
language = "English",
series = "16th International Conference on Nanotechnology - IEEE NANO 2016",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "174--175",
booktitle = "16th International Conference on Nanotechnology - IEEE NANO 2016",
address = "美國",
}