High-performance infrared image processing with gray-scale dynamic range correction implemented by FPGA

Chung Kai Tasu, Duc Huy Nguyen, Bhaskar Choubey, Paul C.P. Chao*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

1 Scopus citations

Abstract

In the recent years, the infrared technology has significantly improved the development of science and technology, the military, industry and medical care. It also overcomes many failures in traditional visible light images. However, the output response error of the sensor is caused by the defective hardware of the infrared sensor and the lack of manufacturing technology, which affects the image quality. In this paper, the common infrared image problem is aimed to solve with a correction on the gray-scale dynamic range. This study also proposes a new high-performance compensation algorithm. It uses a redesigned linear conversion architecture to enhance image details through a segmented method, and improve compensation. In addition, the hardware design and bit size of the multiplier is improved. Compared to traditional histogram equalization, the use of hardware resources is significantly reduced. Especially, the compensation part is integrated into the combined logic circuit for implementation and the pipeline technology should be included to reduce time-consuming. The hardware architecture is described in Verilog hardware description language (HDL) via field-programmable gate array (FPGA). The chip, used to perform and verify functions, is Xilinx Kintex-7, while its operating frequency and the hardware resource size used is 105 MHz and 458 LUTS, respectively.

Original languageEnglish
Pages (from-to)2235-2248
Number of pages14
JournalMicrosystem Technologies
Volume28
Issue number10
DOIs
StatePublished - Oct 2022

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