High performance charge-trapping flash memory with highly-scaled trapping layer

Albert Chin*, Chung-Yong Tsai, Hong Wang

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

1 Scopus citations

Abstract

We report a novel charge-trapping (CT) flash memory device with highly scaled equivalent-Si 3N 4-thickness (ENT) trapping layer <4 nm. This device shows a large 10-year extrapolated retention window of 3.1 V at 125°C and excellent endurance of 10 6 cycles, under the fast 100 μs and low ±16 V program/erase. These excellent memory device performances and ultra-thin ENT trapping thickness are the enable technology to continuously downscale the flash memory.

Original languageEnglish
Pages32-35
Number of pages4
DOIs
StatePublished - 2011
Event2011 11th Annual Non-Volatile Memory Technology Symposium, NVMTS 2011 - Shanghai, China
Duration: 7 Nov 20119 Nov 2011

Conference

Conference2011 11th Annual Non-Volatile Memory Technology Symposium, NVMTS 2011
Country/TerritoryChina
CityShanghai
Period7/11/119/11/11

Keywords

  • CT flash
  • Charge-trapping flash
  • ENT
  • high-
  • non-volatile memory

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