High performance and high reliability polysilicon thin-film transistors with multiple nano-wire channels

Yung Chun Wu*, Chun Yen Chang, Ting Chang Chang, Po-Tsun Liu, Chi Shen Chen, Chun Hao Tu, Hsiao-Wen Zan, Ya-Hsiang Tai, Simon Min Sze

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

19 Scopus citations

Abstract

We have investigated the lightly-doped drain (LDD) polysilicon thin-film transistors (poly-Si TFTs) with a series of multi-channel with different widths. The ten 67 nm-wide split channels TFT has best gate control due to its tri-gate structure, and has lowest poly-Si grain boundary defects, which were passivated by NH3 plasma effectively due to its split nano-wires structure. The proposed TFT exhibits high performance electrical characteristics, such as a high ON/OFF current ratio (>109), a steep subthreshold slope (SS) of 137 mV/decade, an absence of drain-induced barrier lowering (DIBL), suppressed kink-effect, and superior reliability.

Original languageEnglish
Article number1419289
Pages (from-to)777-780
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting, IEDM
DOIs
StatePublished - 13 Dec 2004
EventIEEE International Electron Devices Meeting, 2004 IEDM - San Francisco, CA, United States
Duration: 13 Dec 200415 Dec 2004

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