High-gain, low-voltage BEOL logic gate inverter built with film profile engineered IGZO transistors

Rong Jhe Lyu; Yun Hsuan Chiu; Horng-Chih Lin; Pei-Wen Li; Tiao Yuan Huang

doi:10.1109/VLSI-TSA.2016.7480534

High-gain, low-voltage BEOL logic gate inverter built with film profile engineered IGZO transistors

Rong Jhe Lyu, Yun Hsuan Chiu, Horng-Chih Lin, Pei-Wen Li, Tiao Yuan Huang

Institute of Electronics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

8 Scopus citations

Abstract

We demonstrate InGaZnO (IGZO) TFTs with channel-length (L) tunable Vth for high-gain BEOL logic gate inverters in a unique film-profile engineering (FPE) approach. In this FPE scheme the thickness and film profile of gate oxide and IGZO active layer are directly tailored by L (0.4-0.8 μm) in a single step, leading to a wide-ranging tunability in Vth of-0.2-+1.6V at no expense of additional masks and process steps. This provides an effective degree of freedom in the layout design for the realization of area-saving, high-gain unipolar logic inverters with load-Transistors. Record-high voltage gain of 112 is demonstrated from the unipolar logic inverter with depletion-load 0.4 μm IGZO TFT and 0.7μm IGZO drive-Transistor, respectively, at operation voltage (Vdd) of 9V.

Original language	American English
Title of host publication	2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781467394789
DOIs	https://doi.org/10.1109/VLSI-TSA.2016.7480534
State	Published - 27 May 2016
Event	International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016 - Hsinchu, Taiwan Duration: 25 Apr 2016 → 27 Apr 2016

Publication series

Name	2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016

Conference

Conference	International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016
Country/Territory	Taiwan
City	Hsinchu
Period	25/04/16 → 27/04/16

Keywords

Thin film transistors
Logic gates
Films
Bridge circuits
Pulse inverters

Access to Document

10.1109/VLSI-TSA.2016.7480534

Cite this

Lyu, R. J., Chiu, Y. H., Lin, H.-C., Li, P.-W., & Huang, T. Y. (2016). High-gain, low-voltage BEOL logic gate inverter built with film profile engineered IGZO transistors. In 2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016 Article 7480534 (2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-TSA.2016.7480534

Lyu, Rong Jhe ; Chiu, Yun Hsuan ; Lin, Horng-Chih et al. / High-gain, low-voltage BEOL logic gate inverter built with film profile engineered IGZO transistors. 2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016. Institute of Electrical and Electronics Engineers Inc., 2016. (2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016).

@inproceedings{090923507cf34bbc9738a57e81403f3a,

title = "High-gain, low-voltage BEOL logic gate inverter built with film profile engineered IGZO transistors",

abstract = "We demonstrate InGaZnO (IGZO) TFTs with channel-length (L) tunable Vth for high-gain BEOL logic gate inverters in a unique film-profile engineering (FPE) approach. In this FPE scheme the thickness and film profile of gate oxide and IGZO active layer are directly tailored by L (0.4-0.8 μm) in a single step, leading to a wide-ranging tunability in Vth of-0.2-+1.6V at no expense of additional masks and process steps. This provides an effective degree of freedom in the layout design for the realization of area-saving, high-gain unipolar logic inverters with load-Transistors. Record-high voltage gain of 112 is demonstrated from the unipolar logic inverter with depletion-load 0.4 μm IGZO TFT and 0.7μm IGZO drive-Transistor, respectively, at operation voltage (Vdd) of 9V.",

keywords = "Thin film transistors, Logic gates, Films, Bridge circuits, Pulse inverters",

author = "Lyu, {Rong Jhe} and Chiu, {Yun Hsuan} and Horng-Chih Lin and Pei-Wen Li and Huang, {Tiao Yuan}",

year = "2016",

month = may,

day = "27",

doi = "10.1109/VLSI-TSA.2016.7480534",

language = "American English",

series = "2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016",

address = "United States",

note = "International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016 ; Conference date: 25-04-2016 Through 27-04-2016",

}

Lyu, RJ, Chiu, YH, Lin, H-C , Li, P-W & Huang, TY 2016, High-gain, low-voltage BEOL logic gate inverter built with film profile engineered IGZO transistors. in 2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016., 7480534, 2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016, Institute of Electrical and Electronics Engineers Inc., International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016, Hsinchu, Taiwan, 25/04/16. https://doi.org/10.1109/VLSI-TSA.2016.7480534

High-gain, low-voltage BEOL logic gate inverter built with film profile engineered IGZO transistors. / Lyu, Rong Jhe; Chiu, Yun Hsuan; Lin, Horng-Chih et al.
2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016. Institute of Electrical and Electronics Engineers Inc., 2016. 7480534 (2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - High-gain, low-voltage BEOL logic gate inverter built with film profile engineered IGZO transistors

AU - Lyu, Rong Jhe

AU - Chiu, Yun Hsuan

AU - Lin, Horng-Chih

AU - Li, Pei-Wen

AU - Huang, Tiao Yuan

PY - 2016/5/27

Y1 - 2016/5/27

N2 - We demonstrate InGaZnO (IGZO) TFTs with channel-length (L) tunable Vth for high-gain BEOL logic gate inverters in a unique film-profile engineering (FPE) approach. In this FPE scheme the thickness and film profile of gate oxide and IGZO active layer are directly tailored by L (0.4-0.8 μm) in a single step, leading to a wide-ranging tunability in Vth of-0.2-+1.6V at no expense of additional masks and process steps. This provides an effective degree of freedom in the layout design for the realization of area-saving, high-gain unipolar logic inverters with load-Transistors. Record-high voltage gain of 112 is demonstrated from the unipolar logic inverter with depletion-load 0.4 μm IGZO TFT and 0.7μm IGZO drive-Transistor, respectively, at operation voltage (Vdd) of 9V.

AB - We demonstrate InGaZnO (IGZO) TFTs with channel-length (L) tunable Vth for high-gain BEOL logic gate inverters in a unique film-profile engineering (FPE) approach. In this FPE scheme the thickness and film profile of gate oxide and IGZO active layer are directly tailored by L (0.4-0.8 μm) in a single step, leading to a wide-ranging tunability in Vth of-0.2-+1.6V at no expense of additional masks and process steps. This provides an effective degree of freedom in the layout design for the realization of area-saving, high-gain unipolar logic inverters with load-Transistors. Record-high voltage gain of 112 is demonstrated from the unipolar logic inverter with depletion-load 0.4 μm IGZO TFT and 0.7μm IGZO drive-Transistor, respectively, at operation voltage (Vdd) of 9V.

KW - Thin film transistors

KW - Logic gates

KW - Films

KW - Bridge circuits

KW - Pulse inverters

UR - http://www.scopus.com/inward/record.url?scp=84978704816&partnerID=8YFLogxK

U2 - 10.1109/VLSI-TSA.2016.7480534

DO - 10.1109/VLSI-TSA.2016.7480534

M3 - Conference contribution

AN - SCOPUS:84978704816

T3 - 2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016

BT - 2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016

Y2 - 25 April 2016 through 27 April 2016

ER -

Lyu RJ, Chiu YH, Lin HC , Li PW, Huang TY. High-gain, low-voltage BEOL logic gate inverter built with film profile engineered IGZO transistors. In 2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016. Institute of Electrical and Electronics Engineers Inc. 2016. 7480534. (2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016). doi: 10.1109/VLSI-TSA.2016.7480534

High-gain, low-voltage BEOL logic gate inverter built with film profile engineered IGZO transistors

Abstract

Publication series

Conference

Keywords

Access to Document

Other files and links

Fingerprint

Cite this