High gain and low noise single balanced wireless receiver front-end circuit design

Zhe Yang Huang; Che Cheng Huang; Jung Mao Lin; Chung-Chih Hung

doi:10.4028/www.scientific.net/AMM.284-287.2647

High gain and low noise single balanced wireless receiver front-end circuit design

Zhe Yang Huang^*, Che Cheng Huang, Jung Mao Lin, Chung-Chih Hung

^*Corresponding author for this work

Department of Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This paper presents a wideband wireless receiver front-end for 3.1-5.0GHz band group-1 (BG-1) WiMedia application. The front-end circuits are designed in 0.18um standard CMOS process. The experimental results show the maximum conversion power gain is 45.5dB; minimum noise figure is 2.9dB. Input return loss is lower than -9.3dB and output return loss is lower than -6.8dB. The maximum LO conversion power is 0dBm. 3dB working frequency is 1.9GHz (3.1GHz-5.0GHz) Total power consumption is 24.3mW including LNA, mixer and all buffers. Total chip area is 1.27mm2 including dummy and pads.

Original language	English
Title of host publication	Innovation for Applied Science and Technology
Pages	2647-2651
Number of pages	5
DOIs	https://doi.org/10.4028/www.scientific.net/AMM.284-287.2647
State	Published - 2013
Event	2nd International Conference on Engineering and Technology Innovation 2012, ICETI 2012 - Kaohsiung, Taiwan Duration: 2 Nov 2012 → 6 Nov 2012

Publication series

Name	Applied Mechanics and Materials
Volume	284-287
ISSN (Print)	1660-9336
ISSN (Electronic)	1662-7482

Conference

Conference	2nd International Conference on Engineering and Technology Innovation 2012, ICETI 2012
Country/Territory	Taiwan
City	Kaohsiung
Period	2/11/12 → 6/11/12

Keywords

Front-End and Wideband
LNA
Mixer

Access to Document

10.4028/www.scientific.net/AMM.284-287.2647

Cite this

@inproceedings{eebaf138297c40d382b3963818c9dc5f,

title = "High gain and low noise single balanced wireless receiver front-end circuit design",

abstract = "This paper presents a wideband wireless receiver front-end for 3.1-5.0GHz band group-1 (BG-1) WiMedia application. The front-end circuits are designed in 0.18um standard CMOS process. The experimental results show the maximum conversion power gain is 45.5dB; minimum noise figure is 2.9dB. Input return loss is lower than -9.3dB and output return loss is lower than -6.8dB. The maximum LO conversion power is 0dBm. 3dB working frequency is 1.9GHz (3.1GHz-5.0GHz) Total power consumption is 24.3mW including LNA, mixer and all buffers. Total chip area is 1.27mm2 including dummy and pads.",

keywords = "Front-End and Wideband, LNA, Mixer",

author = "Huang, {Zhe Yang} and Huang, {Che Cheng} and Lin, {Jung Mao} and Chung-Chih Hung",

year = "2013",

doi = "10.4028/www.scientific.net/AMM.284-287.2647",

language = "English",

isbn = "9783037856123",

series = "Applied Mechanics and Materials",

pages = "2647--2651",

booktitle = "Innovation for Applied Science and Technology",

note = "2nd International Conference on Engineering and Technology Innovation 2012, ICETI 2012 ; Conference date: 02-11-2012 Through 06-11-2012",

}

Huang, ZY, Huang, CC, Lin, JM & Hung, C-C 2013, High gain and low noise single balanced wireless receiver front-end circuit design. in Innovation for Applied Science and Technology. Applied Mechanics and Materials, vol. 284-287, pp. 2647-2651, 2nd International Conference on Engineering and Technology Innovation 2012, ICETI 2012, Kaohsiung, Taiwan, 2/11/12. https://doi.org/10.4028/www.scientific.net/AMM.284-287.2647

TY - GEN

T1 - High gain and low noise single balanced wireless receiver front-end circuit design

AU - Huang, Zhe Yang

AU - Huang, Che Cheng

AU - Lin, Jung Mao

AU - Hung, Chung-Chih

PY - 2013

Y1 - 2013

N2 - This paper presents a wideband wireless receiver front-end for 3.1-5.0GHz band group-1 (BG-1) WiMedia application. The front-end circuits are designed in 0.18um standard CMOS process. The experimental results show the maximum conversion power gain is 45.5dB; minimum noise figure is 2.9dB. Input return loss is lower than -9.3dB and output return loss is lower than -6.8dB. The maximum LO conversion power is 0dBm. 3dB working frequency is 1.9GHz (3.1GHz-5.0GHz) Total power consumption is 24.3mW including LNA, mixer and all buffers. Total chip area is 1.27mm2 including dummy and pads.

AB - This paper presents a wideband wireless receiver front-end for 3.1-5.0GHz band group-1 (BG-1) WiMedia application. The front-end circuits are designed in 0.18um standard CMOS process. The experimental results show the maximum conversion power gain is 45.5dB; minimum noise figure is 2.9dB. Input return loss is lower than -9.3dB and output return loss is lower than -6.8dB. The maximum LO conversion power is 0dBm. 3dB working frequency is 1.9GHz (3.1GHz-5.0GHz) Total power consumption is 24.3mW including LNA, mixer and all buffers. Total chip area is 1.27mm2 including dummy and pads.

KW - Front-End and Wideband

KW - LNA

KW - Mixer

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U2 - 10.4028/www.scientific.net/AMM.284-287.2647

DO - 10.4028/www.scientific.net/AMM.284-287.2647

M3 - Conference contribution

AN - SCOPUS:84873894329

SN - 9783037856123

T3 - Applied Mechanics and Materials

SP - 2647

EP - 2651

BT - Innovation for Applied Science and Technology

T2 - 2nd International Conference on Engineering and Technology Innovation 2012, ICETI 2012

Y2 - 2 November 2012 through 6 November 2012

ER -

High gain and low noise single balanced wireless receiver front-end circuit design

Abstract

Publication series

Conference

Keywords

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