Abstract
In this paper, we have successfully fabricated low-temperature polycrystalline silicon thin-film transistor (LTPS-TFT) nonvolatile memory devices employing high-κEu2O3 and Y 2O3 films as the charge trapping layer. The LTPS-TFT memory device uses band-to-band tunneling-induced hot hole injection and gate Fowler-Nordheim injection as the program and erase methods, respectively. Compared with the Y2O3 film, the LTPS-TFT memory device using an Eu2O3 charge-trapping layer exhibited a lower subthreshold swing and a larger memory window, a smaller charge loss, and a better endurance performance, presumably because of the higher charge-trapping efficiency of the Eu2O3 film.
Original language | English |
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Article number | 6523940 |
Pages (from-to) | 2251-2255 |
Number of pages | 5 |
Journal | IEEE Transactions on Electron Devices |
Volume | 60 |
Issue number | 7 |
DOIs | |
State | Published - 15 Jul 2013 |
Keywords
- Charge-trapping layer
- EuO
- low-temperature polycrystalline silicon thin-film transistor (LTPS-TFT)
- YO