Guideline of Device Optimization for Ferroelectric InGaZnO Transistor

Yu Hao Chen, I. Ting Wang*, Yue Min Zheng, Tuo Hung Hou

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

The novel hafnium-zirconium oxide- (HZO-) based ferroelectric field-effect transistor with the InGaZnO channel (IGZO FeFET) has gained increasing interest due to its superior carrier mobility and low process temperature. However, the slow Erase speed is inevitable due to the intrinsic difficulty of IGZO channel inversion. Consequently, the floating of the channel region results in inefficient ferroelectric switching (FS) and an undesirable degradation of both operating speed and memory window. In this work, we provide a comprehensive device optimization guideline to mitigate the channel floating effect and enhance FS in the IGZO FeFET, including the deposition condition, thickness, and length of the IGZO channel.

Original languageEnglish
Title of host publication7th IEEE Electron Devices Technology and Manufacturing Conference
Subtitle of host publicationStrengthen the Global Semiconductor Research Collaboration After the Covid-19 Pandemic, EDTM 2023
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350332520
DOIs
StatePublished - 2023
Event7th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2023 - Seoul, Korea, Republic of
Duration: 7 Mar 202310 Mar 2023

Publication series

Name7th IEEE Electron Devices Technology and Manufacturing Conference: Strengthen the Global Semiconductor Research Collaboration After the Covid-19 Pandemic, EDTM 2023

Conference

Conference7th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2023
Country/TerritoryKorea, Republic of
CitySeoul
Period7/03/2310/03/23

Keywords

  • FeFET
  • HZO
  • IGZO
  • channel floating

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