Graphene nanodots with high-k dielectrics for flash memory applications

Kai Ping Chang, Han Hsiang Tai, Jer Chyi Wang, Chao Sung Lai

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In this work, graphene nanodots have been fabricated and characterized as it has the potential for nanodevices application. Here we show non-volatile memory devices based on the capacitor structure by using graphene nanodots as the charge storage nodes. The graphene nanodots on silicon dioxide tunneling barrier were fabricated by etching the graphene with gold nanoparticles as self-aligned mask. Furthermore, different blocking oxide layer were also adopted to optimize the memory characteristics, including retention and operation speed. The memory of graphene nanodots with high-k blocking oxide layer shows higher flat-band voltage shift at low programming voltage, and excellent charge loss less than 12% after 104 sec, potentially provides a promising route for non-volatile memory application.

Original languageEnglish
Title of host publicationProceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017
EditorsYajie Qin, Zhiliang Hong, Ting-Ao Tang
PublisherIEEE Computer Society
Pages433-435
Number of pages3
ISBN (Electronic)9781509066247
DOIs
StatePublished - 1 Jul 2017
Event12th IEEE International Conference on Advanced Semiconductor Integrated Circuits, ASICON 2017 - Guiyang, China
Duration: 25 Oct 201728 Oct 2017

Publication series

NameProceedings of International Conference on ASIC
Volume2017-October
ISSN (Print)2162-7541
ISSN (Electronic)2162-755X

Conference

Conference12th IEEE International Conference on Advanced Semiconductor Integrated Circuits, ASICON 2017
Country/TerritoryChina
CityGuiyang
Period25/10/1728/10/17

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