@inproceedings{59436a82f5c14d989db228478a9bfac4,
title = "Future Computing Platform Design: A Cross-Layer Design Approach",
abstract = "Future computing platforms are facing a paradigm shift with the emerging resistive memory technologies. First, they offer fast memory accesses and data persistence in a single large-capacity device deployed on the memory bus, blurring the boundary between memory and storage. Second, they enable computing-in-memory for neuromorphic computing to mitigate costly data movements. Due to the non-ideality of these resistive memory devices at the moment, we envision that cross-layer design is essential to bring such a system into practice. In this paper, we showcase a few examples to demonstrate how cross-layer design can be developed to fully exploit the potential of resistive memories and accelerate its adoption for future computing platforms.",
author = "Cheng, {Hsiang Yun} and Wu, {Chun Feng} and Christian Hakert and Chen, {Kuan Hsun} and Chang, {Yuan Hao} and Chen, {Jian Jia} and Yang, {Chia Lin} and Kuo, {Tei Wei}",
note = "Publisher Copyright: {\textcopyright} 2021 EDAA.; 2021 Design, Automation and Test in Europe Conference and Exhibition, DATE 2021 ; Conference date: 01-02-2021 Through 05-02-2021",
year = "2021",
month = feb,
day = "1",
doi = "10.23919/DATE51398.2021.9474229",
language = "English",
series = "Proceedings -Design, Automation and Test in Europe, DATE",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "312--317",
booktitle = "Proceedings of the 2021 Design, Automation and Test in Europe, DATE 2021",
address = "美國",
}