First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip

B. Y. Tsui; C. L. Hung; T. K. Tsai; Y. C. Tsui; T. W. Wang; Y. X. Wen; C. P. Shih; J. C. Wang; L. J. Lin; C. H. Wang; K. W. Chu; Po-Hung Chen

doi:10.1109/ISPSD49238.2022.9813677

First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip

B. Y. Tsui^*, C. L. Hung, T. K. Tsai, Y. C. Tsui, T. W. Wang, Y. X. Wen, C. P. Shih, J. C. Wang, L. J. Lin, C. H. Wang, K. W. Chu, Po-Hung Chen

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

16 Scopus citations

Abstract

In this work, we reported the integration of 10-V CMOS logic circuit, 20-V gate driver, and 600-V VDMOSFET on a 4H-SiC single chip for full SiC smart power ICs. This integration process features PMOSFET isolation (P-iso) from the high voltage substrate, local oxidation of SiC isolation between devices, dual gate oxide thickness, and P+ poly-Si gate. It is demonstrated that the blocking capability of the P-iso structure can exceed 700 V and the switch of the VDMOSFET can be controlled by a 10-V signal through a 10-V to 20-V level shifter and a 20-V gate driver.

Original language	English
Title of host publication	2022 34th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	321-324
Number of pages	4
ISBN (Electronic)	9781665422017
DOIs	https://doi.org/10.1109/ISPSD49238.2022.9813677
State	Published - 2022
Event	34th IEEE International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022 - Vancouver, Canada Duration: 22 May 2022 → 25 May 2022

Publication series

Name	Proceedings of the International Symposium on Power Semiconductor Devices and ICs
Volume	2022-May
ISSN (Print)	1063-6854

Conference

Conference	34th IEEE International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022
Country/Territory	Canada
City	Vancouver
Period	22/05/22 → 25/05/22

Keywords

CMOS
gate driver
isolation
power IC
silicon carbide
single-chip integration
VDMOSFET

Access to Document

10.1109/ISPSD49238.2022.9813677

Cite this

Tsui, B. Y., Hung, C. L., Tsai, T. K., Tsui, Y. C., Wang, T. W., Wen, Y. X., Shih, C. P., Wang, J. C., Lin, L. J., Wang, C. H., Chu, K. W., & Chen, P.-H. (2022). First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip. In 2022 34th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022 (pp. 321-324). (Proceedings of the International Symposium on Power Semiconductor Devices and ICs; Vol. 2022-May). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISPSD49238.2022.9813677

Tsui, B. Y. ; Hung, C. L. ; Tsai, T. K. et al. / First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip. 2022 34th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022. Institute of Electrical and Electronics Engineers Inc., 2022. pp. 321-324 (Proceedings of the International Symposium on Power Semiconductor Devices and ICs).

@inproceedings{4dd0b135c86e4d5ab98a9a47c797b687,

title = "First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip",

abstract = "In this work, we reported the integration of 10-V CMOS logic circuit, 20-V gate driver, and 600-V VDMOSFET on a 4H-SiC single chip for full SiC smart power ICs. This integration process features PMOSFET isolation (P-iso) from the high voltage substrate, local oxidation of SiC isolation between devices, dual gate oxide thickness, and P+ poly-Si gate. It is demonstrated that the blocking capability of the P-iso structure can exceed 700 V and the switch of the VDMOSFET can be controlled by a 10-V signal through a 10-V to 20-V level shifter and a 20-V gate driver.",

keywords = "CMOS, gate driver, isolation, power IC, silicon carbide, single-chip integration, VDMOSFET",

author = "Tsui, {B. Y.} and Hung, {C. L.} and Tsai, {T. K.} and Tsui, {Y. C.} and Wang, {T. W.} and Wen, {Y. X.} and Shih, {C. P.} and Wang, {J. C.} and Lin, {L. J.} and Wang, {C. H.} and Chu, {K. W.} and Po-Hung Chen",

note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 34th IEEE International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022 ; Conference date: 22-05-2022 Through 25-05-2022",

year = "2022",

doi = "10.1109/ISPSD49238.2022.9813677",

language = "English",

series = "Proceedings of the International Symposium on Power Semiconductor Devices and ICs",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "321--324",

booktitle = "2022 34th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022",

address = "United States",

}

Tsui, BY, Hung, CL, Tsai, TK, Tsui, YC, Wang, TW, Wen, YX, Shih, CP, Wang, JC, Lin, LJ, Wang, CH, Chu, KW & Chen, P-H 2022, First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip. in 2022 34th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022. Proceedings of the International Symposium on Power Semiconductor Devices and ICs, vol. 2022-May, Institute of Electrical and Electronics Engineers Inc., pp. 321-324, 34th IEEE International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022, Vancouver, Canada, 22/05/22. https://doi.org/10.1109/ISPSD49238.2022.9813677

First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip. / Tsui, B. Y.; Hung, C. L.; Tsai, T. K. et al.
2022 34th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022. Institute of Electrical and Electronics Engineers Inc., 2022. p. 321-324 (Proceedings of the International Symposium on Power Semiconductor Devices and ICs; Vol. 2022-May).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip

AU - Tsui, B. Y.

AU - Hung, C. L.

AU - Tsai, T. K.

AU - Tsui, Y. C.

AU - Wang, T. W.

AU - Wen, Y. X.

AU - Shih, C. P.

AU - Wang, J. C.

AU - Lin, L. J.

AU - Wang, C. H.

AU - Chu, K. W.

AU - Chen, Po-Hung

PY - 2022

Y1 - 2022

N2 - In this work, we reported the integration of 10-V CMOS logic circuit, 20-V gate driver, and 600-V VDMOSFET on a 4H-SiC single chip for full SiC smart power ICs. This integration process features PMOSFET isolation (P-iso) from the high voltage substrate, local oxidation of SiC isolation between devices, dual gate oxide thickness, and P+ poly-Si gate. It is demonstrated that the blocking capability of the P-iso structure can exceed 700 V and the switch of the VDMOSFET can be controlled by a 10-V signal through a 10-V to 20-V level shifter and a 20-V gate driver.

AB - In this work, we reported the integration of 10-V CMOS logic circuit, 20-V gate driver, and 600-V VDMOSFET on a 4H-SiC single chip for full SiC smart power ICs. This integration process features PMOSFET isolation (P-iso) from the high voltage substrate, local oxidation of SiC isolation between devices, dual gate oxide thickness, and P+ poly-Si gate. It is demonstrated that the blocking capability of the P-iso structure can exceed 700 V and the switch of the VDMOSFET can be controlled by a 10-V signal through a 10-V to 20-V level shifter and a 20-V gate driver.

KW - CMOS

KW - gate driver

KW - isolation

KW - power IC

KW - silicon carbide

KW - single-chip integration

KW - VDMOSFET

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U2 - 10.1109/ISPSD49238.2022.9813677

DO - 10.1109/ISPSD49238.2022.9813677

M3 - Conference contribution

AN - SCOPUS:85128695426

T3 - Proceedings of the International Symposium on Power Semiconductor Devices and ICs

SP - 321

EP - 324

BT - 2022 34th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 34th IEEE International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022

Y2 - 22 May 2022 through 25 May 2022

ER -

Tsui BY, Hung CL, Tsai TK, Tsui YC, Wang TW, Wen YX et al. First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip. In 2022 34th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022. Institute of Electrical and Electronics Engineers Inc. 2022. p. 321-324. (Proceedings of the International Symposium on Power Semiconductor Devices and ICs). doi: 10.1109/ISPSD49238.2022.9813677

First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip

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Keywords

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