Fine-Feature Cu/In Interconnect Bonding Using Single Sided Heating and Chip-to-Wafer Bonding Technology

Shih Wei Lee; Ching Yun Chang; Geng Ming Chang; Kuan-Neng Chen

doi:10.1109/JEDS.2016.2645382

Fine-Feature Cu/In Interconnect Bonding Using Single Sided Heating and Chip-to-Wafer Bonding Technology

Shih Wei Lee, Ching Yun Chang, Geng Ming Chang, Kuan-Neng Chen^*

^*Corresponding author for this work

Institute of Electronics

Research output: Contribution to journal › Article › peer-review

3 Scopus citations

Abstract

A submicron-thick Cu/In bonding by using single sided heating approach has been successfully demonstrated on chip-to-wafer-level without antioxidant metal coating. The single sided heating approach can successfully prevent oxidation of Cu metal on the wafer during bonding. As compared with double sided heating method, a lower specific contact resistance can be obtained in single sided heating method. In addition, post-bonding annealing can further improve the bonding quality. Excellent electrical performances of reliability tests show a great potential for future highly dense interconnect.

Original language	English
Article number	7797449
Pages (from-to)	128-131
Number of pages	4
Journal	IEEE Journal of the Electron Devices Society
Volume	5
Issue number	2
DOIs	https://doi.org/10.1109/JEDS.2016.2645382
State	Published - Mar 2017

Keywords

Three-dimensional integration
chip to wafer bonding
single sided heating approach

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title = "Fine-Feature Cu/In Interconnect Bonding Using Single Sided Heating and Chip-to-Wafer Bonding Technology",

abstract = "A submicron-thick Cu/In bonding by using single sided heating approach has been successfully demonstrated on chip-to-wafer-level without antioxidant metal coating. The single sided heating approach can successfully prevent oxidation of Cu metal on the wafer during bonding. As compared with double sided heating method, a lower specific contact resistance can be obtained in single sided heating method. In addition, post-bonding annealing can further improve the bonding quality. Excellent electrical performances of reliability tests show a great potential for future highly dense interconnect.",

keywords = "Three-dimensional integration, chip to wafer bonding, single sided heating approach",

author = "Lee, {Shih Wei} and Chang, {Ching Yun} and Chang, {Geng Ming} and Kuan-Neng Chen",

note = "Publisher Copyright: {\textcopyright} 2016 IEEE.",

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doi = "10.1109/JEDS.2016.2645382",

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AU - Lee, Shih Wei

AU - Chang, Ching Yun

AU - Chang, Geng Ming

AU - Chen, Kuan-Neng

PY - 2017/3

Y1 - 2017/3

N2 - A submicron-thick Cu/In bonding by using single sided heating approach has been successfully demonstrated on chip-to-wafer-level without antioxidant metal coating. The single sided heating approach can successfully prevent oxidation of Cu metal on the wafer during bonding. As compared with double sided heating method, a lower specific contact resistance can be obtained in single sided heating method. In addition, post-bonding annealing can further improve the bonding quality. Excellent electrical performances of reliability tests show a great potential for future highly dense interconnect.

AB - A submicron-thick Cu/In bonding by using single sided heating approach has been successfully demonstrated on chip-to-wafer-level without antioxidant metal coating. The single sided heating approach can successfully prevent oxidation of Cu metal on the wafer during bonding. As compared with double sided heating method, a lower specific contact resistance can be obtained in single sided heating method. In addition, post-bonding annealing can further improve the bonding quality. Excellent electrical performances of reliability tests show a great potential for future highly dense interconnect.

KW - Three-dimensional integration

KW - chip to wafer bonding

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ER -

Fine-Feature Cu/In Interconnect Bonding Using Single Sided Heating and Chip-to-Wafer Bonding Technology

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Keywords

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