@inproceedings{f4f5008513784c8091af19397a249783,
title = "Film-profile-engineered IGZO thin-film transistors with gate/drain offset for high voltage operation",
abstract = "IGZO transistors with various gate/drain-offset lengths (Lgdo) were fabricated with the film-profile-engineering method. Breakdown voltage (VBD) of the fabricated devices increases while transconductance (gm) decreases with increasing Lgdo. In contrast, threshold voltage and subthreshold swing remain relatively unchanged. Vbd of ∼80 V is obtained with Lgdo of 0.3 μm. Output characteristics with operation voltage up to 50 V are also demonstrated, evidencing the capability of the device for high-voltage operation. Impact of hot-carrier stress is also investigated in this work.",
keywords = "Logic gates, Thin film transistors, Stress, Current measurement, Semiconductor device measurement, Electron traps, Fabrication",
author = "Wu, {Ming Hung} and Horng-Chih Lin and Pei-Wen Li and Huang, {Tiao Yuan}",
note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 23rd IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2016 ; Conference date: 18-07-2016 Through 21-07-2016",
year = "2016",
month = sep,
day = "9",
doi = "10.1109/IPFA.2016.7564298",
language = "American English",
series = "Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "272--275",
booktitle = "Proceedings of the 2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2016",
address = "United States",
}