Ferroelectric Tunnel Thin-Film Transistor for Synaptic Applications

William Cheng Yu Ma*, Chun Jung Su, Kuo Hsing Kao, Ta Chun Cho, Jing Qiang Guo, Cheng Jun Wu, Po Ying Wu, Jia Yuan Hung

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

In this work, a ferroelectric tunnel thin-film transistor (FeT-TFT) with polycrystalline-silicon (poly-Si) channel and ferroelectric HfZrOx gate dielectric is demonstrated with analog memory characteristics for the application of synaptic devices. The FeT-TFT exhibits a much lower conduction current of ∼0.032 times in transfer characteristics and maximum conductance (Gd) of ∼ 0.14 to 0.2 times in potentiation and depression operation than the FeTFT due to FeT-TFT’s carrier transport mechanism: interband tunneling. This work employed pulse widths of 75, 150, and 300 ns to modulate Gd, and it was found that using a pulse width of 75 ns could achieve low asymmetry ∼ 1 and high Gd ratio ∼ 20.63 under the consideration of operation speed. When the pulse time is increased, the potentiation and depression voltages can be significantly decreased to maintain the low asymmetry, but the Gd ratio is also reduced. In addition, the endurance characteristic of poly-Si FeT-TFT is found to be strongly related to the degradation effect of subthreshold swing due to the dynamic stress effect in the endurance measurement. This result reveals that the reliability of ferroelectric devices is not only owing to the degradation of the remanent polarization.

Original languageEnglish
Article number055006
JournalECS Journal of Solid State Science and Technology
Volume12
Issue number5
DOIs
StatePublished - May 2023

Keywords

  • ferroelectric memory
  • synaptic device.
  • thin-film transistor
  • tunnel transistor

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