ESD protection design for mixed-voltage I/O buffer by using stacked-NMOS triggered SCR device

Ming-Dou Ker, Chien Hui Chuang, Hsin Chin Jiang

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    6 Scopus citations

    Abstract

    A new ESD protection circuit, by using the stacked-NMOS triggered silicon controlled rectifier (SNTSCR) as the ESD clamp device, is designed to protect the mixed-voltage I/O buffers of CMOS IC's. Without using the thick gate oxide, the experimental results in a 0.35 -μm CMOS process have proven that the human-body-model ESD level of the mixed-voltage I/O buffer can be successfully increased from the original ∼2kV to become 蠑8kV by using this new proposed ESD protection circuit.

    Original languageEnglish
    Title of host publicationElectrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2001
    PublisherESD Association
    Pages32-43
    Number of pages12
    ISBN (Electronic)1585370398
    StatePublished - 11 Sep 2001
    EventElectrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2001 - Portland, United States
    Duration: 11 Sep 200113 Sep 2001

    Publication series

    NameElectrical Overstress/Electrostatic Discharge Symposium Proceedings
    Volume2001-January
    ISSN (Print)0739-5159

    Conference

    ConferenceElectrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2001
    Country/TerritoryUnited States
    CityPortland
    Period11/09/0113/09/01

    Keywords

    • Clamps
    • CMOS process
    • CMOS technology
    • Electrostatic discharge
    • Integrated circuit technology
    • MOS devices
    • Power supplies
    • Protection
    • Thyristors
    • Voltage

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