@inproceedings{049f48efdcf24b9ebed5744fe4cabfec,
title = "ESD Protection Design for Fan-Out Panel-Level Packaging",
abstract = "With a new concept of hetero-integration by combining display and functional redistribution layer (RDL) technologies, the fan-out panel-level package (FOPLP) technology with ESD protection design is studied in this work. The proposed ESD protection circuits in RDL are realized by low temperature poly silicon thin film transistor, and the circuits are used to protect a CMOS inverter. The ESD protection circuits for FOPLP applications are verified in this work.",
author = "Lin, {Chun Yu} and Hsieh, {Chia You} and Dai, {Zih Jyun} and Lai, {Yu Hsuan}",
note = "Publisher Copyright: {\textcopyright} 2022 EOS/ESD Association, Inc.; 2nd Annual International EOS/ESD Symposium on Design and System, IEDS 2022 ; Conference date: 09-11-2022 Through 11-11-2022",
year = "2022",
language = "English",
series = "International EOS/ESD Symposium on Design and System, IEDS 2022",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "International EOS/ESD Symposium on Design and System, IEDS 2022",
address = "美國",
}