ESD protection design for CMOS RF integrated circuits

Ming-Dou Ker, Tung Yang Chen, Chyh Yih Chang

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    7 Scopus citations

    Abstract

    ESD protection design for CMOS RF integrated circuits is proposed in this paper by using the stacked polysilicon diodes as the input ESD protection devices to reduce the total input capacitance and to avoid the noise coupling from the common substrate. The ESD level of the stacked polysilicon diodes on the I/O pad is restored by using the turn-on efficient power-rail ESD clamp circuit, which is constructed by substrate-triggered technique. This polysilicon diode is fully process-compatible to general sub-quarter-micron CMOS processes.

    Original languageEnglish
    Title of host publicationElectrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2001
    PublisherESD Association
    Pages344-352
    Number of pages9
    ISBN (Electronic)1585370398
    StatePublished - 11 Sep 2001
    EventElectrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2001 - Portland, United States
    Duration: 11 Sep 200113 Sep 2001

    Publication series

    NameElectrical Overstress/Electrostatic Discharge Symposium Proceedings
    Volume2001-January
    ISSN (Print)0739-5159

    Conference

    ConferenceElectrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2001
    Country/TerritoryUnited States
    CityPortland
    Period11/09/0113/09/01

    Keywords

    • CMOS integrated circuits
    • Capacitance
    • Coupling circuits
    • Diodes
    • Electrostatic discharge
    • Integrated circuit noise
    • Noise reduction
    • Protection
    • Radio frequency
    • Radiofrequency integrated circuits

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