ESD (Electrostatic Discharge) protection design for nanoelectronics in CMOS technology

Ming-Dou Ker*

*Corresponding author for this work

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    4 Scopus citations

    Abstract

    In thin tutorial, we teach useful on-chip ESD protection designs/or CMOS integrated circuits. The contents include (1) Introduction to Electrostatic Discharge, (2) Design Techniques of ESD Protection Circuit, (3) Whole-Chip ESD Protection Design, and (4) ESD Protection for Mixed-Voltage I/O Interface. The clear ESD protection design concepts and detailed circuit implementations are presented in this course. ESD protection design is more important in the nanoscale CMOS technology. High ESD robustness can not be achieved with only process solutions. The circuit design solutions should be added into the chips with suitable layout arrangement to achieve the purpose of whole-chip ESD protection for IC products.

    Original languageEnglish
    Title of host publicationAdvanced Signal Processing, Circuits, and System Design Techniques for Communications - 2006 IEEE International Symposium on Circuits and Systems, ISCAS 2006
    Pages217-279
    Number of pages63
    DOIs
    StatePublished - 1 Dec 2006
    EventAdvanced Signal Processing, Circuits, and System Design Techniques for Communications - 2006 IEEE International Symposium on Circuits and Systems, ISCAS 2006 - Kos, Greece
    Duration: 21 May 200624 May 2006

    Publication series

    NameAdvanced Signal Processing, Circuits, and System Design Techniques for Communications - 2006 IEEE International Symposium on Circuits and Systems, ISCAS 2006

    Conference

    ConferenceAdvanced Signal Processing, Circuits, and System Design Techniques for Communications - 2006 IEEE International Symposium on Circuits and Systems, ISCAS 2006
    Country/TerritoryGreece
    CityKos
    Period21/05/0624/05/06

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