@inproceedings{3a454003b32744d2a1cb8cf69db1c401,
title = "Enhancing Data Reuse in Cache Contention Aware Thread Scheduling on GPGPU",
abstract = "GPGPUs have been widely adopted as throughput processing platforms for modern big-data and cloud computing. Attaining a high performance design on a GPGPU requires careful tradeoffs among various design concerns. Data reuse, cache contention, and thread level parallelism, have been demonstrated as three imperative performance factors for a GPGPU. The correlated performance impacts of these factors pose non-Trivial concerns when scheduling threads on GPGPUs. This paper proposes a three-staged scheduling scheme to coschedule the threads with consideration of the three factors. The experiment results on a set of irregular parallel applications, when compared with previous approaches, have demonstrated up to 70% execution time improvement.",
keywords = "cache, GPGPU, performance, thread scheduling",
author = "Lu, {Chin Fu} and Kuo, {Hsien Kai} and Bo-Cheng Lai",
year = "2016",
month = dec,
day = "19",
doi = "10.1109/CISIS.2016.132",
language = "English",
series = "Proceedings - 2016 10th International Conference on Complex, Intelligent, and Software Intensive Systems, CISIS 2016",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "351--356",
editor = "Leonard Barolli and Fatos Xhafa and Makoto Ikeda",
booktitle = "Proceedings - 2016 10th International Conference on Complex, Intelligent, and Software Intensive Systems, CISIS 2016",
address = "United States",
note = "null ; Conference date: 06-07-2016 Through 08-07-2016",
}