Electric-field enhancement of a gate-all-around nanowire thin-film transistor memory

Po Chun Huang*, Lu An Chen, Jeng-Tzong Sheu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

36 Scopus citations

Abstract

A high-performance gate-all-around (GAA) poly-Si nanowire (NW) SONOS-type memory thin-film transistor (TFT) is presented. The presence of the corners of the GAA structure resulted in the program speed and memory window of this device being superior to those of a planar poly-Si TFT device. When erasing, planar devices exhibit a threshold-voltage shift resulting from gate injection; the GAA device was immune to this behavior. The presence of a nonuniform electric field in the channel region during programming and erasing was confirmed through simulation. The device also exhibited superior endurance and data-retention behavior.

Original languageEnglish
Article number5406072
Pages (from-to)216-218
Number of pages3
JournalIEEE Electron Device Letters
Volume31
Issue number3
DOIs
StatePublished - 1 Mar 2010

Keywords

  • Field enhancement
  • Gate injection
  • Gate-all-around (GAA)
  • Nanowire (NW)
  • SONOS
  • Thin-film transistor (TFT)

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